Lines Matching refs:UART_CR
49 UART_CR = 0x14, enumerator
121 val = readl(port->membase + UART_CR); in netx_stop_tx()
122 writel(val & ~CR_TIE, port->membase + UART_CR); in netx_stop_tx()
128 val = readl(port->membase + UART_CR); in netx_stop_rx()
129 writel(val & ~CR_RIE, port->membase + UART_CR); in netx_stop_rx()
135 val = readl(port->membase + UART_CR); in netx_enable_ms()
136 writel(val | CR_MSIE, port->membase + UART_CR); in netx_enable_ms()
173 readl(port->membase + UART_CR) | CR_TIE, port->membase + UART_CR); in netx_start_tx()
323 port->membase + UART_CR); in netx_startup()
331 writel(0, port->membase + UART_CR) ; in netx_shutdown()
382 old_cr = readl(port->membase + UART_CR); in netx_set_termios()
386 port->membase + UART_CR); in netx_set_termios()
392 writel(old_cr & ~CR_UART_EN, port->membase + UART_CR); in netx_set_termios()
427 writel(old_cr, port->membase + UART_CR); in netx_set_termios()
541 cr_save = readl(port->membase + UART_CR); in netx_console_write()
542 writel(cr_save | CR_UART_EN, port->membase + UART_CR); in netx_console_write()
547 writel(cr_save, port->membase + UART_CR); in netx_console_write()
616 if (readl(sport->port.membase + UART_CR) & CR_UART_EN) { in netx_console_setup()