123 	dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_core_reset()
779 		dev_vdbg(hsotg->dev, "control/bulk\n");  in dwc2_hc_enable_slave_ints()
807 			dev_vdbg(hsotg->dev, "intr\n");  in dwc2_hc_enable_slave_ints()
829 			dev_vdbg(hsotg->dev, "isoc\n");  in dwc2_hc_enable_slave_ints()
846 		dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);  in dwc2_hc_enable_slave_ints()
860 			dev_vdbg(hsotg->dev, "desc DMA disabled\n");  in dwc2_hc_enable_dma_ints()
864 			dev_vdbg(hsotg->dev, "desc DMA enabled\n");  in dwc2_hc_enable_dma_ints()
872 			dev_vdbg(hsotg->dev, "setting ACK\n");  in dwc2_hc_enable_dma_ints()
883 		dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);  in dwc2_hc_enable_dma_ints()
893 			dev_vdbg(hsotg->dev, "DMA enabled\n");  in dwc2_hc_enable_ints()
897 			dev_vdbg(hsotg->dev, "DMA disabled\n");  in dwc2_hc_enable_ints()
906 		dev_vdbg(hsotg->dev, "set HAINTMSK to %08x\n", intmsk);  in dwc2_hc_enable_ints()
913 		dev_vdbg(hsotg->dev, "set GINTMSK to %08x\n", intmsk);  in dwc2_hc_enable_ints()
935 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_init()
959 		dev_vdbg(hsotg->dev, "set HCCHAR(%d) to %08x\n",  in dwc2_hc_init()
962 		dev_vdbg(hsotg->dev, "%s: Channel %d\n",  in dwc2_hc_init()
964 		dev_vdbg(hsotg->dev, "	 Dev Addr: %d\n",  in dwc2_hc_init()
966 		dev_vdbg(hsotg->dev, "	 Ep Num: %d\n",  in dwc2_hc_init()
968 		dev_vdbg(hsotg->dev, "	 Is In: %d\n",  in dwc2_hc_init()
970 		dev_vdbg(hsotg->dev, "	 Is Low Speed: %d\n",  in dwc2_hc_init()
972 		dev_vdbg(hsotg->dev, "	 Ep Type: %d\n",  in dwc2_hc_init()
974 		dev_vdbg(hsotg->dev, "	 Max Pkt: %d\n",  in dwc2_hc_init()
981 			dev_vdbg(hsotg->dev,  in dwc2_hc_init()
994 			dev_vdbg(hsotg->dev, "	  comp split %d\n",  in dwc2_hc_init()
996 			dev_vdbg(hsotg->dev, "	  xact pos %d\n",  in dwc2_hc_init()
998 			dev_vdbg(hsotg->dev, "	  hub addr %d\n",  in dwc2_hc_init()
1000 			dev_vdbg(hsotg->dev, "	  hub port %d\n",  in dwc2_hc_init()
1002 			dev_vdbg(hsotg->dev, "	  is_in %d\n",  in dwc2_hc_init()
1004 			dev_vdbg(hsotg->dev, "	  Max Pkt %d\n",  in dwc2_hc_init()
1006 			dev_vdbg(hsotg->dev, "	  xferlen %d\n",  in dwc2_hc_init()
1048 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_halt()
1062 		dev_vdbg(hsotg->dev, "dequeue/error\n");  in dwc2_hc_halt()
1101 		dev_vdbg(hsotg->dev,  in dwc2_hc_halt()
1113 			dev_vdbg(hsotg->dev, "desc DMA disabled\n");  in dwc2_hc_halt()
1123 			dev_vdbg(hsotg->dev, "DMA not enabled\n");  in dwc2_hc_halt()
1129 			dev_vdbg(hsotg->dev, "control/bulk\n");  in dwc2_hc_halt()
1132 				dev_vdbg(hsotg->dev, "Disabling channel\n");  in dwc2_hc_halt()
1137 				dev_vdbg(hsotg->dev, "isoc/intr\n");  in dwc2_hc_halt()
1142 					dev_vdbg(hsotg->dev, "Disabling channel\n");  in dwc2_hc_halt()
1148 			dev_vdbg(hsotg->dev, "DMA enabled\n");  in dwc2_hc_halt()
1156 			dev_vdbg(hsotg->dev, "Channel enabled\n");  in dwc2_hc_halt()
1161 			dev_vdbg(hsotg->dev, "Channel disabled\n");  in dwc2_hc_halt()
1166 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_halt()
1168 		dev_vdbg(hsotg->dev, "	 hcchar: 0x%08x\n",  in dwc2_hc_halt()
1170 		dev_vdbg(hsotg->dev, "	 halt_pending: %d\n",  in dwc2_hc_halt()
1172 		dev_vdbg(hsotg->dev, "	 halt_on_queue: %d\n",  in dwc2_hc_halt()
1174 		dev_vdbg(hsotg->dev, "	 halt_status: %d\n",  in dwc2_hc_halt()
1272 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_write_packet()
1344 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_start_transfer()
1349 				dev_vdbg(hsotg->dev, "ping, no DMA\n");  in dwc2_hc_start_transfer()
1355 				dev_vdbg(hsotg->dev, "ping, DMA\n");  in dwc2_hc_start_transfer()
1362 			dev_vdbg(hsotg->dev, "split\n");  in dwc2_hc_start_transfer()
1380 			dev_vdbg(hsotg->dev, "no split\n");  in dwc2_hc_start_transfer()
1448 		dev_vdbg(hsotg->dev, "Wrote %08x to HCTSIZ(%d)\n",  in dwc2_hc_start_transfer()
1451 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_start_transfer()
1453 		dev_vdbg(hsotg->dev, "	 Xfer Size: %d\n",  in dwc2_hc_start_transfer()
1456 		dev_vdbg(hsotg->dev, "	 Num Pkts: %d\n",  in dwc2_hc_start_transfer()
1459 		dev_vdbg(hsotg->dev, "	 Start PID: %d\n",  in dwc2_hc_start_transfer()
1469 				dev_vdbg(hsotg->dev, "align_buf\n");  in dwc2_hc_start_transfer()
1476 			dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n",  in dwc2_hc_start_transfer()
1504 		dev_vdbg(hsotg->dev, "	 Multi Cnt: %d\n",  in dwc2_hc_start_transfer()
1510 		dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,  in dwc2_hc_start_transfer()
1560 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_start_transfer_ddma()
1562 		dev_vdbg(hsotg->dev, "	 Start PID: %d\n",  in dwc2_hc_start_transfer_ddma()
1564 		dev_vdbg(hsotg->dev, "	 NTD: %d\n", chan->ntd - 1);  in dwc2_hc_start_transfer_ddma()
1575 		dev_vdbg(hsotg->dev, "Wrote %08x to HCDMA(%d)\n",  in dwc2_hc_start_transfer_ddma()
1593 		dev_vdbg(hsotg->dev, "	 Multi Cnt: %d\n",  in dwc2_hc_start_transfer_ddma()
1599 		dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,  in dwc2_hc_start_transfer_ddma()
1630 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_continue_transfer()
1660 			dev_vdbg(hsotg->dev, "	 IN xfer: hcchar = 0x%08x\n",  in dwc2_hc_continue_transfer()
1703 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_do_ping()
1787 	dev_vdbg(hsotg->dev, "%s(%p,%p,%d)\n", __func__, hsotg, dest, bytes);  in dwc2_read_packet()
1969 	dev_vdbg(hsotg->dev, "Flush Tx FIFO %d\n", num);  in dwc2_flush_tx_fifo()
2001 	dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_flush_rx_fifo()