195 		dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");  in uhci_generic_reset_hc()
226 		dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",  in uhci_generic_check_and_reset_hc()
233 		dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",  in uhci_generic_check_and_reset_hc()
240 	dev_dbg(uhci_dev(uhci), "Performing full reset\n");  in uhci_generic_check_and_reset_hc()
362 		dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");  in suspend_rh()
429 			dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");  in wakeup_rh()
459 			dev_err(uhci_dev(uhci),  in uhci_irq()
462 			dev_err(uhci_dev(uhci),  in uhci_irq()
466 				dev_err(uhci_dev(uhci),  in uhci_irq()
540 	dma_free_coherent(uhci_dev(uhci),  in release_uhci()
586 		dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");  in uhci_start()
592 	uhci->frame = dma_alloc_coherent(uhci_dev(uhci),  in uhci_start()
596 		dev_err(uhci_dev(uhci),  in uhci_start()
605 		dev_err(uhci_dev(uhci),  in uhci_start()
610 	uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),  in uhci_start()
613 		dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");  in uhci_start()
617 	uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),  in uhci_start()
620 		dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");  in uhci_start()
626 		dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");  in uhci_start()
633 			dev_err(uhci_dev(uhci), "unable to allocate QH\n");  in uhci_start()
697 	dma_free_coherent(uhci_dev(uhci),  in uhci_start()
741 		dev_dbg(uhci_dev(uhci),  in uhci_rh_suspend()
829 		dev_info(uhci_dev(uhci), "detected %d ports\n", port);  in uhci_count_ports()
833 		dev_info(uhci_dev(uhci),  in uhci_count_ports()