Lines Matching refs:mclk
311 static int mclk; variable
373 int pll, mclk, xclk, ecp_max; member
447 par->pll_limits.mclk = aty_chips[i].mclk; in correct_chipset()
475 par->pll_limits.mclk = 67; in correct_chipset()
483 par->pll_limits.mclk = 67; in correct_chipset()
493 par->pll_limits.mclk = 67; in correct_chipset()
501 par->pll_limits.mclk = 67; in correct_chipset()
513 par->pll_limits.mclk = 67; in correct_chipset()
521 par->pll_limits.mclk = 67; in correct_chipset()
2421 if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM) in aty_init()
2422 par->pll_limits.mclk = 63; in aty_init()
2434 par->pll_limits.mclk = 70; in aty_init()
2442 if (mclk) in aty_init()
2443 par->pll_limits.mclk = mclk; in aty_init()
2449 par->mclk_per = 1000000/par->pll_limits.mclk; in aty_init()
2575 par->pll_limits.pll_max, par->pll_limits.mclk, in aty_init()
3425 par->pll_limits.mclk = pll_block.MCLK_max_freq/100; in init_from_bios()
3859 mclk = simple_strtoul(this_opt + 5, NULL, 0); in atyfb_setup()
4015 module_param(mclk, int, 0);
4016 MODULE_PARM_DESC(mclk, "int: override memory clock");