1418 	} *post_div,  in radeon_calc_pll_regs()  local
1487 	for (post_div = &post_divs[0]; post_div->divider; ++post_div) {  in radeon_calc_pll_regs()
1488 		pll_output_freq = post_div->divider * freq;  in radeon_calc_pll_regs()
1492 		if (uses_dvo && (post_div->divider & 1))  in radeon_calc_pll_regs()
1501 	if ( !post_div->divider ) {  in radeon_calc_pll_regs()
1502 		post_div = &post_divs[post_div->bitvalue];  in radeon_calc_pll_regs()
1503 		pll_output_freq = post_div->divider * freq;  in radeon_calc_pll_regs()
1511 	if ( !post_div->divider ) {  in radeon_calc_pll_regs()
1512 		post_div = &post_divs[post_div->bitvalue];  in radeon_calc_pll_regs()
1513 		pll_output_freq = post_div->divider * freq;  in radeon_calc_pll_regs()
1522 	regs->ppll_div_3 = fb_div | (post_div->bitvalue << 16);  in radeon_calc_pll_regs()
1524 	pr_debug("post div = 0x%x\n", post_div->bitvalue);  in radeon_calc_pll_regs()