Lines Matching refs:pllMPLL_CNTL
660 rinfo->save_regs[73] = INPLL(pllMPLL_CNTL); in radeon_pm_save_regs()
1467 tmp = INPLL(pllMPLL_CNTL); in radeon_pm_all_ppls_off()
1468 OUTPLL(pllMPLL_CNTL, tmp | 0x3); in radeon_pm_all_ppls_off()
1515 tmp = INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1516 OUTREG8(CLOCK_CNTL_INDEX, pllMPLL_CNTL + PLL_WR_EN); in radeon_pm_start_mclk_sclk()
1527 tmp = INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1528 OUTPLL(pllMPLL_CNTL, tmp & ~0x2); in radeon_pm_start_mclk_sclk()
1529 (void)INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1534 tmp = INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1535 OUTPLL(pllMPLL_CNTL, tmp & ~0x1); in radeon_pm_start_mclk_sclk()
1536 (void)INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1859 OUTPLL(pllMPLL_CNTL, rinfo->save_regs[73] | 0x03); in radeon_reinitialize_M10()
2091 OUTPLL(pllMPLL_CNTL, rinfo->save_regs[73] | 0x03); in radeon_reinitialize_M9P()