Lines Matching refs:dsim
32 void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_func_reset() argument
36 reg = readl(dsim->reg_base + EXYNOS_DSIM_SWRST); in exynos_mipi_dsi_func_reset()
40 writel(reg, dsim->reg_base + EXYNOS_DSIM_SWRST); in exynos_mipi_dsi_func_reset()
43 void exynos_mipi_dsi_sw_reset(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_sw_reset() argument
47 reg = readl(dsim->reg_base + EXYNOS_DSIM_SWRST); in exynos_mipi_dsi_sw_reset()
51 writel(reg, dsim->reg_base + EXYNOS_DSIM_SWRST); in exynos_mipi_dsi_sw_reset()
54 void exynos_mipi_dsi_sw_reset_release(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_sw_reset_release() argument
58 reg = readl(dsim->reg_base + EXYNOS_DSIM_INTSRC); in exynos_mipi_dsi_sw_reset_release()
62 writel(reg, dsim->reg_base + EXYNOS_DSIM_INTSRC); in exynos_mipi_dsi_sw_reset_release()
65 int exynos_mipi_dsi_get_sw_reset_release(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_get_sw_reset_release() argument
67 return (readl(dsim->reg_base + EXYNOS_DSIM_INTSRC)) & in exynos_mipi_dsi_get_sw_reset_release()
71 unsigned int exynos_mipi_dsi_read_interrupt_mask(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_read_interrupt_mask() argument
75 reg = readl(dsim->reg_base + EXYNOS_DSIM_INTMSK); in exynos_mipi_dsi_read_interrupt_mask()
80 void exynos_mipi_dsi_set_interrupt_mask(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_interrupt_mask() argument
90 writel(reg, dsim->reg_base + EXYNOS_DSIM_INTMSK); in exynos_mipi_dsi_set_interrupt_mask()
93 void exynos_mipi_dsi_init_fifo_pointer(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_init_fifo_pointer() argument
98 reg = readl(dsim->reg_base + EXYNOS_DSIM_FIFOCTRL); in exynos_mipi_dsi_init_fifo_pointer()
100 writel(reg & ~(cfg), dsim->reg_base + EXYNOS_DSIM_FIFOCTRL); in exynos_mipi_dsi_init_fifo_pointer()
104 writel(reg, dsim->reg_base + EXYNOS_DSIM_FIFOCTRL); in exynos_mipi_dsi_init_fifo_pointer()
110 void exynos_mipi_dsi_set_phy_tunning(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_phy_tunning() argument
113 writel(DSIM_AFC_CTL(value), dsim->reg_base + EXYNOS_DSIM_PHYACCHR); in exynos_mipi_dsi_set_phy_tunning()
116 void exynos_mipi_dsi_set_main_stand_by(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_main_stand_by() argument
121 reg = readl(dsim->reg_base + EXYNOS_DSIM_MDRESOL); in exynos_mipi_dsi_set_main_stand_by()
128 writel(reg, dsim->reg_base + EXYNOS_DSIM_MDRESOL); in exynos_mipi_dsi_set_main_stand_by()
131 void exynos_mipi_dsi_set_main_disp_resol(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_main_disp_resol() argument
137 reg = (readl(dsim->reg_base + EXYNOS_DSIM_MDRESOL)) & in exynos_mipi_dsi_set_main_disp_resol()
139 writel(reg, dsim->reg_base + EXYNOS_DSIM_MDRESOL); in exynos_mipi_dsi_set_main_disp_resol()
145 writel(reg, dsim->reg_base + EXYNOS_DSIM_MDRESOL); in exynos_mipi_dsi_set_main_disp_resol()
148 void exynos_mipi_dsi_set_main_disp_vporch(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_main_disp_vporch() argument
153 reg = (readl(dsim->reg_base + EXYNOS_DSIM_MVPORCH)) & in exynos_mipi_dsi_set_main_disp_vporch()
161 writel(reg, dsim->reg_base + EXYNOS_DSIM_MVPORCH); in exynos_mipi_dsi_set_main_disp_vporch()
164 void exynos_mipi_dsi_set_main_disp_hporch(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_main_disp_hporch() argument
169 reg = (readl(dsim->reg_base + EXYNOS_DSIM_MHPORCH)) & in exynos_mipi_dsi_set_main_disp_hporch()
174 writel(reg, dsim->reg_base + EXYNOS_DSIM_MHPORCH); in exynos_mipi_dsi_set_main_disp_hporch()
177 void exynos_mipi_dsi_set_main_disp_sync_area(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_main_disp_sync_area() argument
182 reg = (readl(dsim->reg_base + EXYNOS_DSIM_MSYNC)) & in exynos_mipi_dsi_set_main_disp_sync_area()
188 writel(reg, dsim->reg_base + EXYNOS_DSIM_MSYNC); in exynos_mipi_dsi_set_main_disp_sync_area()
191 void exynos_mipi_dsi_set_sub_disp_resol(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_sub_disp_resol() argument
196 reg = (readl(dsim->reg_base + EXYNOS_DSIM_SDRESOL)) & in exynos_mipi_dsi_set_sub_disp_resol()
199 writel(reg, dsim->reg_base + EXYNOS_DSIM_SDRESOL); in exynos_mipi_dsi_set_sub_disp_resol()
204 writel(reg, dsim->reg_base + EXYNOS_DSIM_SDRESOL); in exynos_mipi_dsi_set_sub_disp_resol()
207 writel(reg, dsim->reg_base + EXYNOS_DSIM_SDRESOL); in exynos_mipi_dsi_set_sub_disp_resol()
210 void exynos_mipi_dsi_init_config(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_init_config() argument
212 struct mipi_dsim_config *dsim_config = dsim->dsim_config; in exynos_mipi_dsi_init_config()
214 unsigned int cfg = (readl(dsim->reg_base + EXYNOS_DSIM_CONFIG)) & in exynos_mipi_dsi_init_config()
226 writel(cfg, dsim->reg_base + EXYNOS_DSIM_CONFIG); in exynos_mipi_dsi_init_config()
229 void exynos_mipi_dsi_display_config(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_display_config() argument
232 u32 reg = (readl(dsim->reg_base + EXYNOS_DSIM_CONFIG)) & in exynos_mipi_dsi_display_config()
241 dev_err(dsim->dev, "unknown lcd type.\n"); in exynos_mipi_dsi_display_config()
250 writel(reg, dsim->reg_base + EXYNOS_DSIM_CONFIG); in exynos_mipi_dsi_display_config()
253 void exynos_mipi_dsi_enable_lane(struct mipi_dsim_device *dsim, unsigned int lane, in exynos_mipi_dsi_enable_lane() argument
258 reg = readl(dsim->reg_base + EXYNOS_DSIM_CONFIG); in exynos_mipi_dsi_enable_lane()
265 writel(reg, dsim->reg_base + EXYNOS_DSIM_CONFIG); in exynos_mipi_dsi_enable_lane()
269 void exynos_mipi_dsi_set_data_lane_number(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_data_lane_number() argument
277 writel(cfg, dsim->reg_base + EXYNOS_DSIM_CONFIG); in exynos_mipi_dsi_set_data_lane_number()
280 void exynos_mipi_dsi_enable_afc(struct mipi_dsim_device *dsim, unsigned int enable, in exynos_mipi_dsi_enable_afc() argument
283 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_PHYACCHR); in exynos_mipi_dsi_enable_afc()
292 writel(reg, dsim->reg_base + EXYNOS_DSIM_PHYACCHR); in exynos_mipi_dsi_enable_afc()
295 void exynos_mipi_dsi_enable_pll_bypass(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_enable_pll_bypass() argument
298 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & in exynos_mipi_dsi_enable_pll_bypass()
303 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); in exynos_mipi_dsi_enable_pll_bypass()
306 void exynos_mipi_dsi_set_pll_pms(struct mipi_dsim_device *dsim, unsigned int p, in exynos_mipi_dsi_set_pll_pms() argument
309 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL); in exynos_mipi_dsi_set_pll_pms()
313 writel(reg, dsim->reg_base + EXYNOS_DSIM_PLLCTRL); in exynos_mipi_dsi_set_pll_pms()
316 void exynos_mipi_dsi_pll_freq_band(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_pll_freq_band() argument
319 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & in exynos_mipi_dsi_pll_freq_band()
324 writel(reg, dsim->reg_base + EXYNOS_DSIM_PLLCTRL); in exynos_mipi_dsi_pll_freq_band()
327 void exynos_mipi_dsi_pll_freq(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_pll_freq() argument
331 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & in exynos_mipi_dsi_pll_freq()
337 writel(reg, dsim->reg_base + EXYNOS_DSIM_PLLCTRL); in exynos_mipi_dsi_pll_freq()
340 void exynos_mipi_dsi_pll_stable_time(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_pll_stable_time() argument
343 writel(lock_time, dsim->reg_base + EXYNOS_DSIM_PLLTMR); in exynos_mipi_dsi_pll_stable_time()
346 void exynos_mipi_dsi_enable_pll(struct mipi_dsim_device *dsim, unsigned int enable) in exynos_mipi_dsi_enable_pll() argument
348 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & in exynos_mipi_dsi_enable_pll()
353 writel(reg, dsim->reg_base + EXYNOS_DSIM_PLLCTRL); in exynos_mipi_dsi_enable_pll()
356 void exynos_mipi_dsi_set_byte_clock_src(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_byte_clock_src() argument
359 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & in exynos_mipi_dsi_set_byte_clock_src()
364 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); in exynos_mipi_dsi_set_byte_clock_src()
367 void exynos_mipi_dsi_enable_byte_clock(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_enable_byte_clock() argument
370 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & in exynos_mipi_dsi_enable_byte_clock()
375 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); in exynos_mipi_dsi_enable_byte_clock()
378 void exynos_mipi_dsi_set_esc_clk_prs(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_esc_clk_prs() argument
381 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & in exynos_mipi_dsi_set_esc_clk_prs()
388 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); in exynos_mipi_dsi_set_esc_clk_prs()
391 void exynos_mipi_dsi_enable_esc_clk_on_lane(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_enable_esc_clk_on_lane() argument
394 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL); in exynos_mipi_dsi_enable_esc_clk_on_lane()
402 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); in exynos_mipi_dsi_enable_esc_clk_on_lane()
405 void exynos_mipi_dsi_force_dphy_stop_state(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_force_dphy_stop_state() argument
408 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_ESCMODE)) & in exynos_mipi_dsi_force_dphy_stop_state()
413 writel(reg, dsim->reg_base + EXYNOS_DSIM_ESCMODE); in exynos_mipi_dsi_force_dphy_stop_state()
416 unsigned int exynos_mipi_dsi_is_lane_state(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_is_lane_state() argument
418 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_STATUS); in exynos_mipi_dsi_is_lane_state()
434 void exynos_mipi_dsi_set_stop_state_counter(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_stop_state_counter() argument
437 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_ESCMODE)) & in exynos_mipi_dsi_set_stop_state_counter()
442 writel(reg, dsim->reg_base + EXYNOS_DSIM_ESCMODE); in exynos_mipi_dsi_set_stop_state_counter()
445 void exynos_mipi_dsi_set_bta_timeout(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_bta_timeout() argument
448 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_TIMEOUT)) & in exynos_mipi_dsi_set_bta_timeout()
453 writel(reg, dsim->reg_base + EXYNOS_DSIM_TIMEOUT); in exynos_mipi_dsi_set_bta_timeout()
456 void exynos_mipi_dsi_set_lpdr_timeout(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_lpdr_timeout() argument
459 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_TIMEOUT)) & in exynos_mipi_dsi_set_lpdr_timeout()
464 writel(reg, dsim->reg_base + EXYNOS_DSIM_TIMEOUT); in exynos_mipi_dsi_set_lpdr_timeout()
467 void exynos_mipi_dsi_set_cpu_transfer_mode(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_cpu_transfer_mode() argument
470 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_ESCMODE); in exynos_mipi_dsi_set_cpu_transfer_mode()
477 writel(reg, dsim->reg_base + EXYNOS_DSIM_ESCMODE); in exynos_mipi_dsi_set_cpu_transfer_mode()
480 void exynos_mipi_dsi_set_lcdc_transfer_mode(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_lcdc_transfer_mode() argument
483 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_ESCMODE); in exynos_mipi_dsi_set_lcdc_transfer_mode()
490 writel(reg, dsim->reg_base + EXYNOS_DSIM_ESCMODE); in exynos_mipi_dsi_set_lcdc_transfer_mode()
493 void exynos_mipi_dsi_enable_hs_clock(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_enable_hs_clock() argument
496 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_CLKCTRL)) & in exynos_mipi_dsi_enable_hs_clock()
501 writel(reg, dsim->reg_base + EXYNOS_DSIM_CLKCTRL); in exynos_mipi_dsi_enable_hs_clock()
504 void exynos_mipi_dsi_dp_dn_swap(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_dp_dn_swap() argument
507 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_PHYACCHR1); in exynos_mipi_dsi_dp_dn_swap()
512 writel(reg, dsim->reg_base + EXYNOS_DSIM_PHYACCHR1); in exynos_mipi_dsi_dp_dn_swap()
515 void exynos_mipi_dsi_hs_zero_ctrl(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_hs_zero_ctrl() argument
518 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & in exynos_mipi_dsi_hs_zero_ctrl()
523 writel(reg, dsim->reg_base + EXYNOS_DSIM_PLLCTRL); in exynos_mipi_dsi_hs_zero_ctrl()
526 void exynos_mipi_dsi_prep_ctrl(struct mipi_dsim_device *dsim, unsigned int prep) in exynos_mipi_dsi_prep_ctrl() argument
528 unsigned int reg = (readl(dsim->reg_base + EXYNOS_DSIM_PLLCTRL)) & in exynos_mipi_dsi_prep_ctrl()
533 writel(reg, dsim->reg_base + EXYNOS_DSIM_PLLCTRL); in exynos_mipi_dsi_prep_ctrl()
536 unsigned int exynos_mipi_dsi_read_interrupt(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_read_interrupt() argument
538 return readl(dsim->reg_base + EXYNOS_DSIM_INTSRC); in exynos_mipi_dsi_read_interrupt()
541 void exynos_mipi_dsi_clear_interrupt(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_clear_interrupt() argument
544 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_INTSRC); in exynos_mipi_dsi_clear_interrupt()
548 writel(reg, dsim->reg_base + EXYNOS_DSIM_INTSRC); in exynos_mipi_dsi_clear_interrupt()
551 void exynos_mipi_dsi_set_interrupt(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_set_interrupt() argument
561 writel(reg, dsim->reg_base + EXYNOS_DSIM_INTSRC); in exynos_mipi_dsi_set_interrupt()
564 unsigned int exynos_mipi_dsi_is_pll_stable(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_is_pll_stable() argument
568 reg = readl(dsim->reg_base + EXYNOS_DSIM_STATUS); in exynos_mipi_dsi_is_pll_stable()
573 unsigned int exynos_mipi_dsi_get_fifo_state(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_get_fifo_state() argument
575 return readl(dsim->reg_base + EXYNOS_DSIM_FIFOCTRL) & ~(0x1f); in exynos_mipi_dsi_get_fifo_state()
578 void exynos_mipi_dsi_wr_tx_header(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_wr_tx_header() argument
583 writel(reg, dsim->reg_base + EXYNOS_DSIM_PKTHDR); in exynos_mipi_dsi_wr_tx_header()
586 void exynos_mipi_dsi_rd_tx_header(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_rd_tx_header() argument
591 writel(reg, dsim->reg_base + EXYNOS_DSIM_PKTHDR); in exynos_mipi_dsi_rd_tx_header()
594 unsigned int exynos_mipi_dsi_rd_rx_fifo(struct mipi_dsim_device *dsim) in exynos_mipi_dsi_rd_rx_fifo() argument
596 return readl(dsim->reg_base + EXYNOS_DSIM_RXFIFO); in exynos_mipi_dsi_rd_rx_fifo()
599 unsigned int _exynos_mipi_dsi_get_frame_done_status(struct mipi_dsim_device *dsim) in _exynos_mipi_dsi_get_frame_done_status() argument
601 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_INTSRC); in _exynos_mipi_dsi_get_frame_done_status()
606 void _exynos_mipi_dsi_clear_frame_done(struct mipi_dsim_device *dsim) in _exynos_mipi_dsi_clear_frame_done() argument
608 unsigned int reg = readl(dsim->reg_base + EXYNOS_DSIM_INTSRC); in _exynos_mipi_dsi_clear_frame_done()
610 writel(reg | INTSRC_FRAME_DONE, dsim->reg_base + in _exynos_mipi_dsi_clear_frame_done()
614 void exynos_mipi_dsi_wr_tx_data(struct mipi_dsim_device *dsim, in exynos_mipi_dsi_wr_tx_data() argument
617 writel(tx_data, dsim->reg_base + EXYNOS_DSIM_PAYLOAD); in exynos_mipi_dsi_wr_tx_data()