Lines Matching refs:dcfg
352 unsigned int gcfg, dcfg; in lx_set_mode() local
441 dcfg = DC_DISPLAY_CFG_VDEN; /* Enable video data */ in lx_set_mode()
442 dcfg |= DC_DISPLAY_CFG_GDEN; /* Enable graphics */ in lx_set_mode()
443 dcfg |= DC_DISPLAY_CFG_TGEN; /* Turn on the timing generator */ in lx_set_mode()
444 dcfg |= DC_DISPLAY_CFG_TRUP; /* Update timings immediately */ in lx_set_mode()
445 dcfg |= DC_DISPLAY_CFG_PALB; /* Palette bypass in > 8 bpp modes */ in lx_set_mode()
446 dcfg |= DC_DISPLAY_CFG_VISL; in lx_set_mode()
447 dcfg |= DC_DISPLAY_CFG_DCEN; /* Always center the display */ in lx_set_mode()
453 dcfg |= DC_DISPLAY_CFG_DISP_MODE_8BPP; in lx_set_mode()
457 dcfg |= DC_DISPLAY_CFG_DISP_MODE_16BPP; in lx_set_mode()
462 dcfg |= DC_DISPLAY_CFG_DISP_MODE_24BPP; in lx_set_mode()
501 write_dc(par, DC_DISPLAY_CFG, dcfg); in lx_set_mode()
528 u32 dcfg, misc, fp_pm; in lx_blank_display() local
552 dcfg = read_vp(par, VP_DCFG); in lx_blank_display()
553 dcfg &= ~(VP_DCFG_DAC_BL_EN | VP_DCFG_HSYNC_EN | VP_DCFG_VSYNC_EN | in lx_blank_display()
556 dcfg |= VP_DCFG_DAC_BL_EN | VP_DCFG_CRT_EN; in lx_blank_display()
558 dcfg |= VP_DCFG_HSYNC_EN; in lx_blank_display()
560 dcfg |= VP_DCFG_VSYNC_EN; in lx_blank_display()
562 write_vp(par, VP_DCFG, dcfg); in lx_blank_display()