119 static void nvidiafb_load_cursor_image(struct nvidia_par *par, u8 * data8,  in nvidiafb_load_cursor_image()  argument
145 			NV_WR32(&par->CURSOR[k++], 0, tmp);  in nvidiafb_load_cursor_image()
151 static void nvidia_write_clut(struct nvidia_par *par,  in nvidia_write_clut()  argument
154 	NVWriteDacMask(par, 0xff);  in nvidia_write_clut()
155 	NVWriteDacWriteAddr(par, regnum);  in nvidia_write_clut()
156 	NVWriteDacData(par, red);  in nvidia_write_clut()
157 	NVWriteDacData(par, green);  in nvidia_write_clut()
158 	NVWriteDacData(par, blue);  in nvidia_write_clut()
161 static void nvidia_read_clut(struct nvidia_par *par,  in nvidia_read_clut()  argument
164 	NVWriteDacMask(par, 0xff);  in nvidia_read_clut()
165 	NVWriteDacReadAddr(par, regnum);  in nvidia_read_clut()
166 	*red = NVReadDacData(par);  in nvidia_read_clut()
167 	*green = NVReadDacData(par);  in nvidia_read_clut()
168 	*blue = NVReadDacData(par);  in nvidia_read_clut()
171 static int nvidia_panel_tweak(struct nvidia_par *par,  in nvidia_panel_tweak()  argument
176    if (par->paneltweak) {  in nvidia_panel_tweak()
177 	   tweak = par->paneltweak;  in nvidia_panel_tweak()
185 	   if(((par->Chipset & 0xffff) == 0x0328) && (state->bpp == 32)) {  in nvidia_panel_tweak()
190 	   if((par->Chipset & 0xfff0) == 0x0310) {  in nvidia_panel_tweak()
199 static void nvidia_screen_off(struct nvidia_par *par, int on)  in nvidia_screen_off()  argument
207 		tmp = NVReadSeq(par, 0x01);  in nvidia_screen_off()
209 		NVWriteSeq(par, 0x00, 0x01);		/* Synchronous Reset */  in nvidia_screen_off()
210 		NVWriteSeq(par, 0x01, tmp | 0x20);	/* disable the display */  in nvidia_screen_off()
216 		tmp = NVReadSeq(par, 0x01);  in nvidia_screen_off()
218 		NVWriteSeq(par, 0x01, tmp & ~0x20);	/* reenable display */  in nvidia_screen_off()
219 		NVWriteSeq(par, 0x00, 0x03);		/* End Reset */  in nvidia_screen_off()
223 static void nvidia_save_vga(struct nvidia_par *par,  in nvidia_save_vga()  argument
229 	NVLockUnlock(par, 0);  in nvidia_save_vga()
231 	NVUnloadStateExt(par, state);  in nvidia_save_vga()
233 	state->misc_output = NVReadMiscOut(par);  in nvidia_save_vga()
236 		state->crtc[i] = NVReadCrtc(par, i);  in nvidia_save_vga()
239 		state->attr[i] = NVReadAttr(par, i);  in nvidia_save_vga()
242 		state->gra[i] = NVReadGr(par, i);  in nvidia_save_vga()
245 		state->seq[i] = NVReadSeq(par, i);  in nvidia_save_vga()
251 static void nvidia_write_regs(struct nvidia_par *par,  in nvidia_write_regs()  argument
258 	NVLoadStateExt(par, state);  in nvidia_write_regs()
260 	NVWriteMiscOut(par, state->misc_output);  in nvidia_write_regs()
266 		NVWriteSeq(par, i, state->seq[i]);  in nvidia_write_regs()
270 	NVWriteCrtc(par, 0x11, state->crtc[0x11] & ~0x80);  in nvidia_write_regs()
281 			NVWriteCrtc(par, i, state->crtc[i]);  in nvidia_write_regs()
289 		NVWriteGr(par, i, state->gra[i]);  in nvidia_write_regs()
296 		NVWriteAttr(par, i, state->attr[i]);  in nvidia_write_regs()
304 	struct nvidia_par *par = info->par;  in nvidia_calc_regs()  local
305 	struct _riva_hw_state *state = &par->ModeReg;  in nvidia_calc_regs()
331 	if (par->FlatPanel == 1) {  in nvidia_calc_regs()
370 	if (par->Television)  in nvidia_calc_regs()
406 	if (par->Architecture >= NV_ARCH_10)  in nvidia_calc_regs()
407 		par->CURSOR = (volatile u32 __iomem *)(info->screen_base +  in nvidia_calc_regs()
408 						       par->CursorStart);  in nvidia_calc_regs()
419 	NVCalcStateExt(par, state, i, info->var.xres_virtual,  in nvidia_calc_regs()
423 	state->scale = NV_RD32(par->PRAMDAC, 0x00000848) & 0xfff000ff;  in nvidia_calc_regs()
424 	if (par->FlatPanel == 1) {  in nvidia_calc_regs()
427 		if (!par->fpScaler || (par->fpWidth <= info->var.xres)  in nvidia_calc_regs()
428 		    || (par->fpHeight <= info->var.yres)) {  in nvidia_calc_regs()
432 		if (!par->crtcSync_read) {  in nvidia_calc_regs()
433 			state->crtcSync = NV_RD32(par->PRAMDAC, 0x0828);  in nvidia_calc_regs()
434 			par->crtcSync_read = 1;  in nvidia_calc_regs()
437 		par->PanelTweak = nvidia_panel_tweak(par, state);  in nvidia_calc_regs()
445 	VGA_WR08(par->PCIO, 0x03D4, 0x1C);  in nvidia_calc_regs()
446 	state->fifo = VGA_RD08(par->PCIO, 0x03D5) & ~(1<<5);  in nvidia_calc_regs()
448 	if (par->CRTCnumber) {  in nvidia_calc_regs()
449 		state->head = NV_RD32(par->PCRTC0, 0x00000860) & ~0x00001000;  in nvidia_calc_regs()
450 		state->head2 = NV_RD32(par->PCRTC0, 0x00002860) | 0x00001000;  in nvidia_calc_regs()
453 		state->vpll = NV_RD32(par->PRAMDAC0, 0x00000508);  in nvidia_calc_regs()
454 		if (par->twoStagePLL)  in nvidia_calc_regs()
455 			state->vpllB = NV_RD32(par->PRAMDAC0, 0x00000578);  in nvidia_calc_regs()
456 	} else if (par->twoHeads) {  in nvidia_calc_regs()
457 		state->head = NV_RD32(par->PCRTC0, 0x00000860) | 0x00001000;  in nvidia_calc_regs()
458 		state->head2 = NV_RD32(par->PCRTC0, 0x00002860) & ~0x00001000;  in nvidia_calc_regs()
460 		state->vpll2 = NV_RD32(par->PRAMDAC0, 0x0520);  in nvidia_calc_regs()
461 		if (par->twoStagePLL)  in nvidia_calc_regs()
462 			state->vpll2B = NV_RD32(par->PRAMDAC0, 0x057C);  in nvidia_calc_regs()
470 	if (par->alphaCursor) {  in nvidia_calc_regs()
471 		if ((par->Chipset & 0x0ff0) != 0x0110)  in nvidia_calc_regs()
479 	if (par->twoHeads) {  in nvidia_calc_regs()
480 		if ((par->Chipset & 0x0ff0) == 0x0110) {  in nvidia_calc_regs()
481 			state->dither = NV_RD32(par->PRAMDAC, 0x0528) &  in nvidia_calc_regs()
483 			if (par->FPDither)  in nvidia_calc_regs()
486 			state->dither = NV_RD32(par->PRAMDAC, 0x083C) & ~1;  in nvidia_calc_regs()
487 			if (par->FPDither)  in nvidia_calc_regs()
501 	struct nvidia_par *par = info->par;  in nvidia_init_vga()  local
502 	struct _riva_hw_state *state = &par->ModeReg;  in nvidia_init_vga()
536 	struct nvidia_par *par = info->par;  in nvidiafb_cursor()  local
544 	NVShowHideCursor(par, 0);  in nvidiafb_cursor()
546 	if (par->cursor_reset) {  in nvidiafb_cursor()
548 		par->cursor_reset = 0;  in nvidiafb_cursor()
552 		memset_io(par->CURSOR, 0, MAX_CURS * MAX_CURS * 2);  in nvidiafb_cursor()
562 		NV_WR32(par->PRAMDAC, 0x0000300, temp);  in nvidiafb_cursor()
600 			NVLockUnlock(par, 0);  in nvidiafb_cursor()
602 			nvidiafb_load_cursor_image(par, data, bg, fg,  in nvidiafb_cursor()
610 		NVShowHideCursor(par, 1);  in nvidiafb_cursor()
617 	struct nvidia_par *par = info->par;  in nvidiafb_set_par()  local
621 	NVLockUnlock(par, 1);  in nvidiafb_set_par()
622 	if (!par->FlatPanel || !par->twoHeads)  in nvidiafb_set_par()
623 		par->FPDither = 0;  in nvidiafb_set_par()
625 	if (par->FPDither < 0) {  in nvidiafb_set_par()
626 		if ((par->Chipset & 0x0ff0) == 0x0110)  in nvidiafb_set_par()
627 			par->FPDither = !!(NV_RD32(par->PRAMDAC, 0x0528)  in nvidiafb_set_par()
630 			par->FPDither = !!(NV_RD32(par->PRAMDAC, 0x083C) & 1);  in nvidiafb_set_par()
632 		       par->FPDither ? "enabled" : "disabled");  in nvidiafb_set_par()
641 	NVLockUnlock(par, 0);  in nvidiafb_set_par()
642 	if (par->twoHeads) {  in nvidiafb_set_par()
643 		VGA_WR08(par->PCIO, 0x03D4, 0x44);  in nvidiafb_set_par()
644 		VGA_WR08(par->PCIO, 0x03D5, par->ModeReg.crtcOwner);  in nvidiafb_set_par()
645 		NVLockUnlock(par, 0);  in nvidiafb_set_par()
648 	nvidia_screen_off(par, 1);  in nvidiafb_set_par()
650 	nvidia_write_regs(par, &par->ModeReg);  in nvidiafb_set_par()
651 	NVSetStartAddress(par, 0);  in nvidiafb_set_par()
658 		VGA_WR08(par->PCIO, 0x3d4, 0x46);  in nvidiafb_set_par()
659 		tmp = VGA_RD08(par->PCIO, 0x3d5);  in nvidiafb_set_par()
661 		VGA_WR08(par->PCIO, 0x3d5, tmp);  in nvidiafb_set_par()
686 	par->cursor_reset = 1;  in nvidiafb_set_par()
688 	nvidia_screen_off(par, 0);  in nvidiafb_set_par()
697 	NVLockUnlock(par, 0);  in nvidiafb_set_par()
706 	struct nvidia_par *par = info->par;  in nvidiafb_setcolreg()  local
728 		nvidia_write_clut(par, regno, red >> 8, green >> 8, blue >> 8);  in nvidiafb_setcolreg()
733 				nvidia_write_clut(par, regno * 8 + i, red >> 8,  in nvidiafb_setcolreg()
741 					nvidia_write_clut(par, regno * 8 + i,  in nvidiafb_setcolreg()
747 			nvidia_read_clut(par, regno * 4, &r, &g, &b);  in nvidiafb_setcolreg()
750 				nvidia_write_clut(par, regno * 4 + i, r,  in nvidiafb_setcolreg()
755 		nvidia_write_clut(par, regno, red >> 8, green >> 8, blue >> 8);  in nvidiafb_setcolreg()
769 	struct nvidia_par *par = info->par;  in nvidiafb_check_var()  local
853 	if (par->fpWidth && par->fpHeight && (par->fpWidth < var->xres ||  in nvidiafb_check_var()
854 					      par->fpHeight < var->yres)) {  in nvidiafb_check_var()
857 		var->xres = par->fpWidth;  in nvidiafb_check_var()
858 		var->yres = par->fpHeight;  in nvidiafb_check_var()
922 	struct nvidia_par *par = info->par;  in nvidiafb_pan_display()  local
927 	NVSetStartAddress(par, total);  in nvidiafb_pan_display()
934 	struct nvidia_par *par = info->par;  in nvidiafb_blank()  local
937 	tmp = NVReadSeq(par, 0x01) & ~0x20;	/* screen on/off */  in nvidiafb_blank()
938 	vesa = NVReadCrtc(par, 0x1a) & ~0xc0;	/* sync on/off */  in nvidiafb_blank()
960 	NVWriteSeq(par, 0x01, tmp);  in nvidiafb_blank()
961 	NVWriteCrtc(par, 0x1a, vesa);  in nvidiafb_blank()
975 static void save_vga_x86(struct nvidia_par *par)  in save_vga_x86()  argument
977 	struct resource *res= &par->pci_dev->resource[PCI_ROM_RESOURCE];  in save_vga_x86()
980 		memset(&par->vgastate, 0, sizeof(par->vgastate));  in save_vga_x86()
981 		par->vgastate.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS |  in save_vga_x86()
983 		save_vga(&par->vgastate);  in save_vga_x86()
987 static void restore_vga_x86(struct nvidia_par *par)  in restore_vga_x86()  argument
989 	struct resource *res= &par->pci_dev->resource[PCI_ROM_RESOURCE];  in restore_vga_x86()
992 		restore_vga(&par->vgastate);  in restore_vga_x86()
1001 	struct nvidia_par *par = info->par;  in nvidiafb_open()  local
1003 	if (!par->open_count) {  in nvidiafb_open()
1004 		save_vga_x86(par);  in nvidiafb_open()
1005 		nvidia_save_vga(par, &par->initial_state);  in nvidiafb_open()
1008 	par->open_count++;  in nvidiafb_open()
1014 	struct nvidia_par *par = info->par;  in nvidiafb_release()  local
1017 	if (!par->open_count) {  in nvidiafb_release()
1022 	if (par->open_count == 1) {  in nvidiafb_release()
1023 		nvidia_write_regs(par, &par->initial_state);  in nvidiafb_release()
1024 		restore_vga_x86(par);  in nvidiafb_release()
1027 	par->open_count--;  in nvidiafb_release()
1052 	struct nvidia_par *par = info->par;  in nvidiafb_suspend()  local
1057 	par->pm_state = mesg.event;  in nvidiafb_suspend()
1062 		nvidia_write_regs(par, &par->SavedReg);  in nvidiafb_suspend()
1076 	struct nvidia_par *par = info->par;  in nvidiafb_resume()  local
1081 	if (par->pm_state != PM_EVENT_FREEZE) {  in nvidiafb_resume()
1090 	par->pm_state = PM_EVENT_ON;  in nvidiafb_resume()
1108 	struct nvidia_par *par = info->par;  in nvidia_set_fbinfo()  local
1140 	} else if (par->fpWidth && par->fpHeight) {  in nvidia_set_fbinfo()
1144 		snprintf(buf, 15, "%dx%dMR", par->fpWidth, par->fpHeight);  in nvidia_set_fbinfo()
1156 	info->pseudo_palette = par->pseudo_palette;  in nvidia_set_fbinfo()
1177 	switch (par->Architecture) {  in nvidia_set_fbinfo()
1202 	struct nvidia_par *par = info->par;  in nvidia_get_chipset()  local
1203 	u32 id = (par->pci_dev->vendor << 16) | par->pci_dev->device;  in nvidia_get_chipset()
1210 		id = NV_RD32(par->REGS, 0x1800);  in nvidia_get_chipset()
1225 	struct nvidia_par *par = info->par;  in nvidia_get_arch()  local
1228 	switch (par->Chipset & 0x0ff0) {  in nvidia_get_arch()
1277 	struct nvidia_par *par;  in nvidiafb_probe()  local
1290 	par = info->par;  in nvidiafb_probe()
1291 	par->pci_dev = pd;  in nvidiafb_probe()
1307 	par->FlatPanel = flatpanel;  in nvidiafb_probe()
1310 	par->FPDither = fpdither;  in nvidiafb_probe()
1312 	par->CRTCnumber = forceCRTC;  in nvidiafb_probe()
1313 	par->FpScale = (!noscale);  in nvidiafb_probe()
1314 	par->paneltweak = paneltweak;  in nvidiafb_probe()
1315 	par->reverse_i2c = reverse_i2c;  in nvidiafb_probe()
1326 	par->REGS = ioremap(nvidiafb_fix.mmio_start, nvidiafb_fix.mmio_len);  in nvidiafb_probe()
1328 	if (!par->REGS) {  in nvidiafb_probe()
1333 	par->Chipset = nvidia_get_chipset(info);  in nvidiafb_probe()
1334 	par->Architecture = nvidia_get_arch(info);  in nvidiafb_probe()
1336 	if (par->Architecture == 0) {  in nvidiafb_probe()
1346 	par->FbAddress = nvidiafb_fix.smem_start;  in nvidiafb_probe()
1347 	par->FbMapSize = par->RamAmountKBytes * 1024;  in nvidiafb_probe()
1348 	if (vram && vram * 1024 * 1024 < par->FbMapSize)  in nvidiafb_probe()
1349 		par->FbMapSize = vram * 1024 * 1024;  in nvidiafb_probe()
1352 	if (par->FbMapSize > 64 * 1024 * 1024)  in nvidiafb_probe()
1353 		par->FbMapSize = 64 * 1024 * 1024;  in nvidiafb_probe()
1355 	if(par->Architecture >= NV_ARCH_40)  in nvidiafb_probe()
1356   	        par->FbUsableSize = par->FbMapSize - (560 * 1024);  in nvidiafb_probe()
1358 		par->FbUsableSize = par->FbMapSize - (128 * 1024);  in nvidiafb_probe()
1359 	par->ScratchBufferSize = (par->Architecture < NV_ARCH_10) ? 8 * 1024 :  in nvidiafb_probe()
1361 	par->ScratchBufferStart = par->FbUsableSize - par->ScratchBufferSize;  in nvidiafb_probe()
1362 	par->CursorStart = par->FbUsableSize + (32 * 1024);  in nvidiafb_probe()
1364 	info->screen_base = ioremap(nvidiafb_fix.smem_start, par->FbMapSize);  in nvidiafb_probe()
1365 	info->screen_size = par->FbUsableSize;  in nvidiafb_probe()
1366 	nvidiafb_fix.smem_len = par->RamAmountKBytes * 1024;  in nvidiafb_probe()
1373 	par->FbStart = info->screen_base;  in nvidiafb_probe()
1377 		par->mtrr.vram = mtrr_add(nvidiafb_fix.smem_start,  in nvidiafb_probe()
1378 					  par->RamAmountKBytes * 1024,  in nvidiafb_probe()
1380 		if (par->mtrr.vram < 0) {  in nvidiafb_probe()
1383 			par->mtrr.vram_valid = 1;  in nvidiafb_probe()
1398 	nvidia_save_vga(par, &par->SavedReg);  in nvidiafb_probe()
1403 		nvidia_bl_init(par);  in nvidiafb_probe()
1414 	       par->FbMapSize / (1024 * 1024), info->fix.smem_start);  in nvidiafb_probe()
1423 	nvidia_delete_i2c_busses(par);  in nvidiafb_probe()
1425 	iounmap(par->REGS);  in nvidiafb_probe()
1439 	struct nvidia_par *par = info->par;  in nvidiafb_remove()  local
1445 	nvidia_bl_exit(par);  in nvidiafb_remove()
1448 	if (par->mtrr.vram_valid)  in nvidiafb_remove()
1449 		mtrr_del(par->mtrr.vram, info->fix.smem_start,  in nvidiafb_remove()
1455 	nvidia_delete_i2c_busses(par);  in nvidiafb_remove()
1456 	iounmap(par->REGS);  in nvidiafb_remove()