Lines Matching refs:DSSERR
188 DSSERR("illegal DSS PLL ID %d\n", pll_id); in dss_ctrl_pll_enable()
214 DSSERR("error in PLL mux config for LCD\n"); in dss_ctrl_pll_set_control_mux()
230 DSSERR("error in PLL mux config for LCD2\n"); in dss_ctrl_pll_set_control_mux()
246 DSSERR("error in PLL mux config for LCD3\n"); in dss_ctrl_pll_set_control_mux()
252 DSSERR("error in PLL mux config\n"); in dss_ctrl_pll_set_control_mux()
296 DSSERR("PLL lock request timed out\n"); in dss_sdi_enable()
308 DSSERR("PLL lock timed out\n"); in dss_sdi_enable()
319 DSSERR("SDI reset timed out\n"); in dss_sdi_enable()
738 DSSERR("can't get clock fck\n"); in dss_get_clocks()
747 DSSERR("Failed to get %s\n", dss.feat->parent_clk_name); in dss_get_clocks()
1038 DSSERR("can't get IORESOURCE_MEM DSS\n"); in omap_dsshw_probe()
1045 DSSERR("can't ioremap DSS\n"); in omap_dsshw_probe()
1113 DSSERR("can't get DPLL VDDA regulator\n"); in omap_dsshw_probe()