Lines Matching refs:hdmi
47 static struct omap_hdmi hdmi; variable
55 r = pm_runtime_get_sync(&hdmi.pdev->dev); in hdmi_runtime_get()
69 r = pm_runtime_put_sync(&hdmi.pdev->dev); in hdmi_runtime_put()
98 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_irq_handler()
101 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); in hdmi_irq_handler()
108 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); in hdmi_irq_handler()
124 if (hdmi.vdda_reg != NULL) in hdmi_init_regulator()
127 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda"); in hdmi_init_regulator()
142 hdmi.vdda_reg = reg; in hdmi_init_regulator()
151 r = regulator_enable(hdmi.vdda_reg); in hdmi_power_on_core()
162 hdmi.core_enabled = true; in hdmi_power_on_core()
167 regulator_disable(hdmi.vdda_reg); in hdmi_power_on_core()
174 hdmi.core_enabled = false; in hdmi_power_off_core()
177 regulator_disable(hdmi.vdda_reg); in hdmi_power_off_core()
184 struct omap_overlay_manager *mgr = hdmi.output.manager; in hdmi_power_on_full()
191 p = &hdmi.cfg.timings; in hdmi_power_on_full()
195 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); in hdmi_power_on_full()
198 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); in hdmi_power_on_full()
199 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
200 hdmi_wp_get_irqstatus(&hdmi.wp)); in hdmi_power_on_full()
202 r = dss_pll_enable(&hdmi.pll.pll); in hdmi_power_on_full()
208 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo); in hdmi_power_on_full()
214 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco, in hdmi_power_on_full()
221 r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON); in hdmi_power_on_full()
225 hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg); in hdmi_power_on_full()
233 r = hdmi_wp_video_start(&hdmi.wp); in hdmi_power_on_full()
241 hdmi_wp_set_irqenable(&hdmi.wp, in hdmi_power_on_full()
247 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_on_full()
249 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); in hdmi_power_on_full()
253 dss_pll_disable(&hdmi.pll.pll); in hdmi_power_on_full()
261 struct omap_overlay_manager *mgr = hdmi.output.manager; in hdmi_power_off_full()
263 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); in hdmi_power_off_full()
267 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_off_full()
269 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); in hdmi_power_off_full()
271 dss_pll_disable(&hdmi.pll.pll); in hdmi_power_off_full()
279 struct omap_dss_device *out = &hdmi.output; in hdmi_display_check_timing()
294 mutex_lock(&hdmi.lock); in hdmi_display_set_timing()
296 hdmi.cfg.timings = *timings; in hdmi_display_set_timing()
300 mutex_unlock(&hdmi.lock); in hdmi_display_set_timing()
306 *timings = hdmi.cfg.timings; in hdmi_display_get_timings()
311 mutex_lock(&hdmi.lock); in hdmi_dump_regs()
314 mutex_unlock(&hdmi.lock); in hdmi_dump_regs()
318 hdmi_wp_dump(&hdmi.wp, s); in hdmi_dump_regs()
319 hdmi_pll_dump(&hdmi.pll, s); in hdmi_dump_regs()
320 hdmi_phy_dump(&hdmi.phy, s); in hdmi_dump_regs()
321 hdmi5_core_dump(&hdmi.core, s); in hdmi_dump_regs()
324 mutex_unlock(&hdmi.lock); in hdmi_dump_regs()
332 mutex_lock(&hdmi.lock); in read_edid()
337 idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2); in read_edid()
339 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); in read_edid()
341 r = hdmi5_read_edid(&hdmi.core, buf, len); in read_edid()
343 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2); in read_edid()
346 mutex_unlock(&hdmi.lock); in read_edid()
353 struct omap_dss_device *out = &hdmi.output; in hdmi_display_enable()
358 mutex_lock(&hdmi.lock); in hdmi_display_enable()
372 hdmi.display_enabled = true; in hdmi_display_enable()
374 mutex_unlock(&hdmi.lock); in hdmi_display_enable()
378 mutex_unlock(&hdmi.lock); in hdmi_display_enable()
386 mutex_lock(&hdmi.lock); in hdmi_display_disable()
388 if (hdmi.audio_pdev && hdmi.audio_abort_cb) in hdmi_display_disable()
389 hdmi.audio_abort_cb(&hdmi.audio_pdev->dev); in hdmi_display_disable()
393 hdmi.display_enabled = false; in hdmi_display_disable()
395 mutex_unlock(&hdmi.lock); in hdmi_display_disable()
404 mutex_lock(&hdmi.lock); in hdmi_core_enable()
412 mutex_unlock(&hdmi.lock); in hdmi_core_enable()
416 mutex_unlock(&hdmi.lock); in hdmi_core_enable()
424 mutex_lock(&hdmi.lock); in hdmi_core_disable()
428 mutex_unlock(&hdmi.lock); in hdmi_core_disable()
480 need_enable = hdmi.core_enabled == false; in hdmi_read_edid()
499 hdmi.cfg.infoframe = *avi; in hdmi_set_infoframe()
506 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI; in hdmi_set_hdmi_mode()
528 struct omap_dss_device *out = &hdmi.output; in hdmi_init_output()
535 out->ops.hdmi = &hdmi_ops; in hdmi_init_output()
543 struct omap_dss_device *out = &hdmi.output; in hdmi_uninit_output()
558 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy); in hdmi_probe_of()
611 hd->wp_idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2); in hdmi_audio_start()
612 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); in hdmi_audio_start()
631 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2); in hdmi_audio_stop()
669 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp), in hdmi_audio_register()
673 hdmi.audio_pdev = platform_device_register_data( in hdmi_audio_register()
677 if (IS_ERR(hdmi.audio_pdev)) in hdmi_audio_register()
678 return PTR_ERR(hdmi.audio_pdev); in hdmi_audio_register()
689 hdmi.pdev = pdev; in omapdss_hdmihw_probe()
690 dev_set_drvdata(&pdev->dev, &hdmi); in omapdss_hdmihw_probe()
692 mutex_init(&hdmi.lock); in omapdss_hdmihw_probe()
700 r = hdmi_wp_init(pdev, &hdmi.wp); in omapdss_hdmihw_probe()
704 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp); in omapdss_hdmihw_probe()
708 r = hdmi_phy_init(pdev, &hdmi.phy); in omapdss_hdmihw_probe()
712 r = hdmi5_core_init(pdev, &hdmi.core); in omapdss_hdmihw_probe()
725 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp); in omapdss_hdmihw_probe()
747 hdmi_pll_uninit(&hdmi.pll); in omapdss_hdmihw_probe()
753 if (hdmi.audio_pdev) in omapdss_hdmihw_remove()
754 platform_device_unregister(hdmi.audio_pdev); in omapdss_hdmihw_remove()
758 hdmi_pll_uninit(&hdmi.pll); in omapdss_hdmihw_remove()