Lines Matching refs:P
619 unsigned int M, N, P, pll, MClk; in nv3UpdateArbitrationSettings() local
622 M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; in nv3UpdateArbitrationSettings()
623 MClk = (N * chip->CrystalFreqKHz / M) >> P; in nv3UpdateArbitrationSettings()
808 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
811 M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; in nv4UpdateArbitrationSettings()
812 MClk = (N * chip->CrystalFreqKHz / M) >> P; in nv4UpdateArbitrationSettings()
814 M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; in nv4UpdateArbitrationSettings()
815 NVClk = (N * chip->CrystalFreqKHz / M) >> P; in nv4UpdateArbitrationSettings()
1071 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
1074 M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; in nv10UpdateArbitrationSettings()
1075 MClk = (N * chip->CrystalFreqKHz / M) >> P; in nv10UpdateArbitrationSettings()
1077 M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; in nv10UpdateArbitrationSettings()
1078 NVClk = (N * chip->CrystalFreqKHz / M) >> P; in nv10UpdateArbitrationSettings()
1116 unsigned int M, N, P, pll, MClk, NVClk; in nForceUpdateArbitrationSettings() local
1129 M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; in nForceUpdateArbitrationSettings()
1130 NVClk = (N * chip->CrystalFreqKHz / M) >> P; in nForceUpdateArbitrationSettings()
1181 unsigned M, N, P; in CalcVClock() local
1199 for (P = 0; P <= highP; P ++) in CalcVClock()
1201 Freq = VClk << P; in CalcVClock()
1206 N = (VClk << P) * M / chip->CrystalFreqKHz; in CalcVClock()
1208 Freq = (chip->CrystalFreqKHz * N / M) >> P; in CalcVClock()
1217 *pOut = P; in CalcVClock()