623 	temp_ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
626 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
630 	iowrite32be(vme_base_high, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
632 	iowrite32be(vme_base_low, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
634 	iowrite32be(vme_bound_high, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
636 	iowrite32be(vme_bound_low, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
638 	iowrite32be(pci_offset_high, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
640 	iowrite32be(pci_offset_low, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
685 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
691 	iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_set()
716 	ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
719 	vme_base_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
721 	vme_base_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
723 	vme_bound_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
725 	vme_bound_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
727 	pci_offset_high = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
729 	pci_offset_low = ioread32be(bridge->base + TSI148_LCSR_IT[i] +  in tsi148_slave_get()
2674 		iowrite32be(0, bridge->base + TSI148_LCSR_IT[i] +  in tsi148_remove()