55 static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev)  in azx_stream_start()  argument
60 	azx_dev->insufficient = 1;  in azx_stream_start()
64 		   azx_readl(chip, INTCTL) | (1 << azx_dev->index));  in azx_stream_start()
66 	azx_sd_writeb(chip, azx_dev, SD_CTL,  in azx_stream_start()
67 		      azx_sd_readb(chip, azx_dev, SD_CTL) |  in azx_stream_start()
72 static void azx_stream_clear(struct azx *chip, struct azx_dev *azx_dev)  in azx_stream_clear()  argument
74 	azx_sd_writeb(chip, azx_dev, SD_CTL,  in azx_stream_clear()
75 		      azx_sd_readb(chip, azx_dev, SD_CTL) &  in azx_stream_clear()
77 	azx_sd_writeb(chip, azx_dev, SD_STS, SD_INT_MASK); /* to be sure */  in azx_stream_clear()
81 void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev)  in azx_stream_stop()  argument
83 	azx_stream_clear(chip, azx_dev);  in azx_stream_stop()
86 		   azx_readl(chip, INTCTL) & ~(1 << azx_dev->index));  in azx_stream_stop()
91 static void azx_stream_reset(struct azx *chip, struct azx_dev *azx_dev)  in azx_stream_reset()  argument
96 	azx_stream_clear(chip, azx_dev);  in azx_stream_reset()
98 	azx_sd_writeb(chip, azx_dev, SD_CTL,  in azx_stream_reset()
99 		      azx_sd_readb(chip, azx_dev, SD_CTL) |  in azx_stream_reset()
103 	while (!((val = azx_sd_readb(chip, azx_dev, SD_CTL)) &  in azx_stream_reset()
107 	azx_sd_writeb(chip, azx_dev, SD_CTL, val);  in azx_stream_reset()
112 	while (((val = azx_sd_readb(chip, azx_dev, SD_CTL)) &  in azx_stream_reset()
117 	*azx_dev->posbuf = 0;  in azx_stream_reset()
123 static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)  in azx_setup_controller()  argument
127 	azx_stream_clear(chip, azx_dev);  in azx_setup_controller()
129 	val = azx_sd_readl(chip, azx_dev, SD_CTL);  in azx_setup_controller()
131 		(azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT);  in azx_setup_controller()
134 	azx_sd_writel(chip, azx_dev, SD_CTL, val);  in azx_setup_controller()
137 	azx_sd_writel(chip, azx_dev, SD_CBL, azx_dev->bufsize);  in azx_setup_controller()
141 	azx_sd_writew(chip, azx_dev, SD_FORMAT, azx_dev->format_val);  in azx_setup_controller()
144 	azx_sd_writew(chip, azx_dev, SD_LVI, azx_dev->frags - 1);  in azx_setup_controller()
148 	azx_sd_writel(chip, azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr);  in azx_setup_controller()
150 	azx_sd_writel(chip, azx_dev, SD_BDLPU,  in azx_setup_controller()
151 		      upper_32_bits(azx_dev->bdl.addr));  in azx_setup_controller()
162 	azx_sd_writel(chip, azx_dev, SD_CTL,  in azx_setup_controller()
163 		      azx_sd_readl(chip, azx_dev, SD_CTL) | SD_INT_MASK);  in azx_setup_controller()
169 static inline struct azx_dev *
173 	struct azx_dev *res = NULL;  in azx_assign_device()
186 		struct azx_dev *azx_dev = &chip->azx_dev[dev];  in azx_assign_device()  local
187 		dsp_lock(azx_dev);  in azx_assign_device()
188 		if (!azx_dev->opened && !dsp_is_locked(azx_dev)) {  in azx_assign_device()
189 			if (azx_dev->assigned_key == key) {  in azx_assign_device()
190 				azx_dev->opened = 1;  in azx_assign_device()
191 				azx_dev->assigned_key = key;  in azx_assign_device()
192 				dsp_unlock(azx_dev);  in azx_assign_device()
193 				return azx_dev;  in azx_assign_device()
197 				res = azx_dev;  in azx_assign_device()
199 		dsp_unlock(azx_dev);  in azx_assign_device()
211 static inline void azx_release_device(struct azx_dev *azx_dev)  in azx_release_device()  argument
213 	azx_dev->opened = 0;  in azx_release_device()
218 	struct azx_dev *azx_dev = container_of(cc, struct azx_dev, azx_cc);  in azx_cc_read()  local
219 	struct snd_pcm_substream *substream = azx_dev->substream;  in azx_cc_read()
229 	struct azx_dev *azx_dev = get_azx_dev(substream);  in azx_timecounter_init()  local
230 	struct timecounter *tc = &azx_dev->azx_tc;  in azx_timecounter_init()
231 	struct cyclecounter *cc = &azx_dev->azx_cc;  in azx_timecounter_init()
292 		      struct azx_dev *azx_dev, u32 **bdlp,  in setup_bdle()  argument
301 		if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES)  in setup_bdle()
323 		azx_dev->frags++;  in setup_bdle()
335 			     struct azx_dev *azx_dev)  in azx_setup_periods()  argument
342 	azx_sd_writel(chip, azx_dev, SD_BDLPL, 0);  in azx_setup_periods()
343 	azx_sd_writel(chip, azx_dev, SD_BDLPU, 0);  in azx_setup_periods()
345 	period_bytes = azx_dev->period_bytes;  in azx_setup_periods()
346 	periods = azx_dev->bufsize / period_bytes;  in azx_setup_periods()
349 	bdl = (u32 *)azx_dev->bdl.area;  in azx_setup_periods()
351 	azx_dev->frags = 0;  in azx_setup_periods()
355 	if (!azx_dev->no_period_wakeup && pos_adj > 0) {  in azx_setup_periods()
371 					 azx_dev,  in azx_setup_periods()
382 					 azx_dev, &bdl, ofs,  in azx_setup_periods()
386 					 azx_dev, &bdl, ofs,  in azx_setup_periods()
388 					 !azx_dev->no_period_wakeup);  in azx_setup_periods()
396 		azx_dev->bufsize, period_bytes);  in azx_setup_periods()
409 	struct azx_dev *azx_dev = get_azx_dev(substream);  in azx_pcm_close()  local
414 	azx_dev->substream = NULL;  in azx_pcm_close()
415 	azx_dev->running = 0;  in azx_pcm_close()
417 	azx_release_device(azx_dev);  in azx_pcm_close()
449 	struct azx_dev *azx_dev = get_azx_dev(substream);  in azx_pcm_hw_free()  local
455 	dsp_lock(azx_dev);  in azx_pcm_hw_free()
456 	if (!dsp_is_locked(azx_dev)) {  in azx_pcm_hw_free()
457 		azx_sd_writel(chip, azx_dev, SD_BDLPL, 0);  in azx_pcm_hw_free()
458 		azx_sd_writel(chip, azx_dev, SD_BDLPU, 0);  in azx_pcm_hw_free()
459 		azx_sd_writel(chip, azx_dev, SD_CTL, 0);  in azx_pcm_hw_free()
460 		azx_dev->bufsize = 0;  in azx_pcm_hw_free()
461 		azx_dev->period_bytes = 0;  in azx_pcm_hw_free()
462 		azx_dev->format_val = 0;  in azx_pcm_hw_free()
468 	azx_dev->prepared = 0;  in azx_pcm_hw_free()
469 	dsp_unlock(azx_dev);  in azx_pcm_hw_free()
477 	struct azx_dev *azx_dev = get_azx_dev(substream);  in azx_pcm_prepare()  local
486 	dsp_lock(azx_dev);  in azx_pcm_prepare()
487 	if (dsp_is_locked(azx_dev)) {  in azx_pcm_prepare()
492 	azx_stream_reset(chip, azx_dev);  in azx_pcm_prepare()
513 	if (bufsize != azx_dev->bufsize ||  in azx_pcm_prepare()
514 	    period_bytes != azx_dev->period_bytes ||  in azx_pcm_prepare()
515 	    format_val != azx_dev->format_val ||  in azx_pcm_prepare()
516 	    runtime->no_period_wakeup != azx_dev->no_period_wakeup) {  in azx_pcm_prepare()
517 		azx_dev->bufsize = bufsize;  in azx_pcm_prepare()
518 		azx_dev->period_bytes = period_bytes;  in azx_pcm_prepare()
519 		azx_dev->format_val = format_val;  in azx_pcm_prepare()
520 		azx_dev->no_period_wakeup = runtime->no_period_wakeup;  in azx_pcm_prepare()
521 		err = azx_setup_periods(chip, substream, azx_dev);  in azx_pcm_prepare()
531 		azx_dev->delay_negative_threshold = -frames_to_bytes(runtime, 64);  in azx_pcm_prepare()
533 		azx_dev->delay_negative_threshold = 0;  in azx_pcm_prepare()
536 	azx_dev->period_wallclk = (((runtime->period_size * 24000) /  in azx_pcm_prepare()
538 	azx_setup_controller(chip, azx_dev);  in azx_pcm_prepare()
540 		azx_dev->fifo_size =  in azx_pcm_prepare()
541 			azx_sd_readw(chip, azx_dev, SD_FIFOSIZE) + 1;  in azx_pcm_prepare()
543 		azx_dev->fifo_size = 0;  in azx_pcm_prepare()
545 	stream_tag = azx_dev->stream_tag;  in azx_pcm_prepare()
551 				     azx_dev->format_val, substream);  in azx_pcm_prepare()
555 		azx_dev->prepared = 1;  in azx_pcm_prepare()
556 	dsp_unlock(azx_dev);  in azx_pcm_prepare()
564 	struct azx_dev *azx_dev;  in azx_pcm_trigger()  local
569 	azx_dev = get_azx_dev(substream);  in azx_pcm_trigger()
570 	trace_azx_pcm_trigger(chip, azx_dev, cmd);  in azx_pcm_trigger()
572 	if (dsp_is_locked(azx_dev) || !azx_dev->prepared)  in azx_pcm_trigger()
594 		azx_dev = get_azx_dev(s);  in azx_pcm_trigger()
595 		sbits |= 1 << azx_dev->index;  in azx_pcm_trigger()
612 		azx_dev = get_azx_dev(s);  in azx_pcm_trigger()
614 			azx_dev->start_wallclk = azx_readl(chip, WALLCLK);  in azx_pcm_trigger()
616 				azx_dev->start_wallclk -=  in azx_pcm_trigger()
617 						azx_dev->period_wallclk;  in azx_pcm_trigger()
618 			azx_stream_start(chip, azx_dev);  in azx_pcm_trigger()
620 			azx_stream_stop(chip, azx_dev);  in azx_pcm_trigger()
622 		azx_dev->running = start;  in azx_pcm_trigger()
632 				azx_dev = get_azx_dev(s);  in azx_pcm_trigger()
633 				if (!(azx_sd_readb(chip, azx_dev, SD_STS) &  in azx_pcm_trigger()
648 				azx_dev = get_azx_dev(s);  in azx_pcm_trigger()
649 				if (azx_sd_readb(chip, azx_dev, SD_CTL) &  in azx_pcm_trigger()
674 			azx_dev = get_azx_dev(substream);  in azx_pcm_trigger()
675 			cycle_last = azx_dev->azx_tc.cycle_last;  in azx_pcm_trigger()
688 unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev)  in azx_get_pos_lpib()  argument
690 	return azx_sd_readl(chip, azx_dev, SD_LPIB);  in azx_get_pos_lpib()
694 unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev)  in azx_get_pos_posbuf()  argument
696 	return le32_to_cpu(*azx_dev->posbuf);  in azx_get_pos_posbuf()
701 			      struct azx_dev *azx_dev)  in azx_get_position()  argument
703 	struct snd_pcm_substream *substream = azx_dev->substream;  in azx_get_position()
709 		pos = chip->get_position[stream](chip, azx_dev);  in azx_get_position()
711 		pos = azx_get_pos_posbuf(chip, azx_dev);  in azx_get_position()
713 	if (pos >= azx_dev->bufsize)  in azx_get_position()
721 			delay += chip->get_delay[stream](chip, azx_dev, pos);  in azx_get_position()
728 	trace_azx_get_position(chip, azx_dev, pos, delay);  in azx_get_position()
737 	struct azx_dev *azx_dev = get_azx_dev(substream);  in azx_pcm_pointer()  local
739 			       azx_get_position(chip, azx_dev));  in azx_pcm_pointer()
747 	struct azx_dev *azx_dev = get_azx_dev(substream);  in azx_get_time_info()  local
755 		nsec = timecounter_read(&azx_dev->azx_tc);  in azx_get_time_info()
803 	struct azx_dev *azx_dev;  in azx_pcm_open()  local
811 	azx_dev = azx_assign_device(chip, substream);  in azx_pcm_open()
812 	if (azx_dev == NULL) {  in azx_pcm_open()
854 		azx_release_device(azx_dev);  in azx_pcm_open()
863 		azx_release_device(azx_dev);  in azx_pcm_open()
878 	azx_dev->substream = substream;  in azx_pcm_open()
879 	azx_dev->running = 0;  in azx_pcm_open()
882 	runtime->private_data = azx_dev;  in azx_pcm_open()
1363 static struct azx_dev *
1366 	return &chip->azx_dev[chip->playback_index_offset];  in azx_get_dsp_loader_dev()
1375 	struct azx_dev *azx_dev;  in azx_load_dsp_prepare()  local
1378 	azx_dev = azx_get_dsp_loader_dev(chip);  in azx_load_dsp_prepare()
1380 	dsp_lock(azx_dev);  in azx_load_dsp_prepare()
1382 	if (azx_dev->running || azx_dev->locked) {  in azx_load_dsp_prepare()
1387 	azx_dev->prepared = 0;  in azx_load_dsp_prepare()
1388 	chip->saved_azx_dev = *azx_dev;  in azx_load_dsp_prepare()
1389 	azx_dev->locked = 1;  in azx_load_dsp_prepare()
1397 	azx_dev->bufsize = byte_size;  in azx_load_dsp_prepare()
1398 	azx_dev->period_bytes = byte_size;  in azx_load_dsp_prepare()
1399 	azx_dev->format_val = format;  in azx_load_dsp_prepare()
1401 	azx_stream_reset(chip, azx_dev);  in azx_load_dsp_prepare()
1404 	azx_sd_writel(chip, azx_dev, SD_BDLPL, 0);  in azx_load_dsp_prepare()
1405 	azx_sd_writel(chip, azx_dev, SD_BDLPU, 0);  in azx_load_dsp_prepare()
1407 	azx_dev->frags = 0;  in azx_load_dsp_prepare()
1408 	bdl = (u32 *)azx_dev->bdl.area;  in azx_load_dsp_prepare()
1409 	err = setup_bdle(chip, bufp, azx_dev, &bdl, 0, byte_size, 0);  in azx_load_dsp_prepare()
1413 	azx_setup_controller(chip, azx_dev);  in azx_load_dsp_prepare()
1414 	dsp_unlock(azx_dev);  in azx_load_dsp_prepare()
1415 	return azx_dev->stream_tag;  in azx_load_dsp_prepare()
1421 	if (azx_dev->opened)  in azx_load_dsp_prepare()
1422 		*azx_dev = chip->saved_azx_dev;  in azx_load_dsp_prepare()
1423 	azx_dev->locked = 0;  in azx_load_dsp_prepare()
1426 	dsp_unlock(azx_dev);  in azx_load_dsp_prepare()
1433 	struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip);  in azx_load_dsp_trigger()  local
1436 		azx_stream_start(chip, azx_dev);  in azx_load_dsp_trigger()
1438 		azx_stream_stop(chip, azx_dev);  in azx_load_dsp_trigger()
1439 	azx_dev->running = start;  in azx_load_dsp_trigger()
1446 	struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip);  in azx_load_dsp_cleanup()  local
1448 	if (!dmab->area || !azx_dev->locked)  in azx_load_dsp_cleanup()
1451 	dsp_lock(azx_dev);  in azx_load_dsp_cleanup()
1453 	azx_sd_writel(chip, azx_dev, SD_BDLPL, 0);  in azx_load_dsp_cleanup()
1454 	azx_sd_writel(chip, azx_dev, SD_BDLPU, 0);  in azx_load_dsp_cleanup()
1455 	azx_sd_writel(chip, azx_dev, SD_CTL, 0);  in azx_load_dsp_cleanup()
1456 	azx_dev->bufsize = 0;  in azx_load_dsp_cleanup()
1457 	azx_dev->period_bytes = 0;  in azx_load_dsp_cleanup()
1458 	azx_dev->format_val = 0;  in azx_load_dsp_cleanup()
1464 	if (azx_dev->opened)  in azx_load_dsp_cleanup()
1465 		*azx_dev = chip->saved_azx_dev;  in azx_load_dsp_cleanup()
1466 	azx_dev->locked = 0;  in azx_load_dsp_cleanup()
1468 	dsp_unlock(azx_dev);  in azx_load_dsp_cleanup()
1477 		dsp_lock_init(&chip->azx_dev[i]);  in azx_alloc_stream_pages()
1481 						 &chip->azx_dev[i].bdl);  in azx_alloc_stream_pages()
1502 	if (chip->azx_dev) {  in azx_free_stream_pages()
1504 			if (chip->azx_dev[i].bdl.area)  in azx_free_stream_pages()
1506 					chip, &chip->azx_dev[i].bdl);  in azx_free_stream_pages()
1607 		struct azx_dev *azx_dev = &chip->azx_dev[i];  in azx_int_disable()  local
1608 		azx_sd_writeb(chip, azx_dev, SD_CTL,  in azx_int_disable()
1609 			      azx_sd_readb(chip, azx_dev, SD_CTL) &  in azx_int_disable()
1628 		struct azx_dev *azx_dev = &chip->azx_dev[i];  in azx_int_clear()  local
1629 		azx_sd_writeb(chip, azx_dev, SD_STS, SD_INT_MASK);  in azx_int_clear()
1695 	struct azx_dev *azx_dev;  in azx_interrupt()  local
1720 		azx_dev = &chip->azx_dev[i];  in azx_interrupt()
1721 		if (status & azx_dev->sd_int_sta_mask) {  in azx_interrupt()
1722 			sd_status = azx_sd_readb(chip, azx_dev, SD_STS);  in azx_interrupt()
1723 			azx_sd_writeb(chip, azx_dev, SD_STS, SD_INT_MASK);  in azx_interrupt()
1724 			if (!azx_dev->substream || !azx_dev->running ||  in azx_interrupt()
1729 			    chip->ops->position_check(chip, azx_dev)) {  in azx_interrupt()
1731 				snd_pcm_period_elapsed(azx_dev->substream);  in azx_interrupt()
1942 		struct azx_dev *azx_dev = &chip->azx_dev[i];  in azx_init_stream()  local
1943 		azx_dev->posbuf = (u32 __iomem *)(chip->posbuf.area + i * 8);  in azx_init_stream()
1945 		azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80);  in azx_init_stream()
1947 		azx_dev->sd_int_sta_mask = 1 << i;  in azx_init_stream()
1948 		azx_dev->index = i;  in azx_init_stream()
1957 			azx_dev->stream_tag =  in azx_init_stream()
1962 			azx_dev->stream_tag = i + 1;  in azx_init_stream()