667 	if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])  in snd_vt1724_set_pro_rate()
994 			ice->hw_rates = &hw_constraints_rates_192;  in set_std_hw_rates()
996 			ice->hw_rates = &hw_constraints_rates_96;  in set_std_hw_rates()
999 		ice->hw_rates = &hw_constraints_rates_48;  in set_std_hw_rates()
1008 	runtime->hw.rate_min = ice->hw_rates->list[0];  in set_rate_constraints()
1009 	runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];  in set_rate_constraints()
1013 					  ice->hw_rates);  in set_rate_constraints()
1855 	int hw_rates_count = ice->hw_rates->count;  in snd_vt1724_pro_internal_clock_info()
1876 			ice->hw_rates->list[uinfo->value.enumerated.item]);  in snd_vt1724_pro_internal_clock_info()
1888 		ucontrol->value.enumerated.item[0] = ice->hw_rates->count +  in snd_vt1724_pro_internal_clock_get()
1893 		for (i = 0; i < ice->hw_rates->count; i++) {  in snd_vt1724_pro_internal_clock_get()
1894 			if (ice->hw_rates->list[i] == rate) {  in snd_vt1724_pro_internal_clock_get()
1930 	unsigned int first_ext_clock = ice->hw_rates->count;  in snd_vt1724_pro_internal_clock_put()
1947 		new_rate = ice->hw_rates->list[item];  in snd_vt1724_pro_internal_clock_put()
2697 	if (!ice->hw_rates)  in snd_vt1724_probe()