168 struct ichdev {  struct
206 	struct ichdev ichd[2];  argument
395 static void snd_intel8x0m_setup_periods(struct intel8x0m *chip, struct ichdev *ichdev)  in snd_intel8x0m_setup_periods()  argument
398 	u32 *bdbar = ichdev->bdbar;  in snd_intel8x0m_setup_periods()
399 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0m_setup_periods()
401 	iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);  in snd_intel8x0m_setup_periods()
402 	if (ichdev->size == ichdev->fragsize) {  in snd_intel8x0m_setup_periods()
403 		ichdev->ack_reload = ichdev->ack = 2;  in snd_intel8x0m_setup_periods()
404 		ichdev->fragsize1 = ichdev->fragsize >> 1;  in snd_intel8x0m_setup_periods()
406 			bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf);  in snd_intel8x0m_setup_periods()
408 						     ichdev->fragsize1 >> chip->pcm_pos_shift);  in snd_intel8x0m_setup_periods()
409 			bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1));  in snd_intel8x0m_setup_periods()
411 						     ichdev->fragsize1 >> chip->pcm_pos_shift);  in snd_intel8x0m_setup_periods()
413 		ichdev->frags = 2;  in snd_intel8x0m_setup_periods()
415 		ichdev->ack_reload = ichdev->ack = 1;  in snd_intel8x0m_setup_periods()
416 		ichdev->fragsize1 = ichdev->fragsize;  in snd_intel8x0m_setup_periods()
418 			bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + (((idx >> 1) * ichdev->fragsize) % ichdev->size));  in snd_intel8x0m_setup_periods()
420 						     ichdev->fragsize >> chip->pcm_pos_shift);  in snd_intel8x0m_setup_periods()
426 		ichdev->frags = ichdev->size / ichdev->fragsize;  in snd_intel8x0m_setup_periods()
428 	iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK);  in snd_intel8x0m_setup_periods()
429 	ichdev->civ = 0;  in snd_intel8x0m_setup_periods()
431 	ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;  in snd_intel8x0m_setup_periods()
432 	ichdev->position = 0;  in snd_intel8x0m_setup_periods()
436 	       ichdev->lvi_frag, ichdev->frags, ichdev->fragsize,  in snd_intel8x0m_setup_periods()
437 	       ichdev->fragsize1);  in snd_intel8x0m_setup_periods()
440 	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);  in snd_intel8x0m_setup_periods()
447 static inline void snd_intel8x0m_update(struct intel8x0m *chip, struct ichdev *ichdev)  in snd_intel8x0m_update()  argument
449 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0m_update()
454 	if (civ == ichdev->civ) {  in snd_intel8x0m_update()
457 		ichdev->civ++;  in snd_intel8x0m_update()
458 		ichdev->civ &= ICH_REG_LVI_MASK;  in snd_intel8x0m_update()
460 		step = civ - ichdev->civ;  in snd_intel8x0m_update()
465 		ichdev->civ = civ;  in snd_intel8x0m_update()
468 	ichdev->position += step * ichdev->fragsize1;  in snd_intel8x0m_update()
469 	ichdev->position %= ichdev->size;  in snd_intel8x0m_update()
470 	ichdev->lvi += step;  in snd_intel8x0m_update()
471 	ichdev->lvi &= ICH_REG_LVI_MASK;  in snd_intel8x0m_update()
472 	iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);  in snd_intel8x0m_update()
474 		ichdev->lvi_frag++;  in snd_intel8x0m_update()
475 		ichdev->lvi_frag %= ichdev->frags;  in snd_intel8x0m_update()
476 		ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf +  in snd_intel8x0m_update()
477 							     ichdev->lvi_frag *  in snd_intel8x0m_update()
478 							     ichdev->fragsize1);  in snd_intel8x0m_update()
482 		       ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2],  in snd_intel8x0m_update()
483 		       ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port),  in snd_intel8x0m_update()
486 		if (--ichdev->ack == 0) {  in snd_intel8x0m_update()
487 			ichdev->ack = ichdev->ack_reload;  in snd_intel8x0m_update()
491 	if (ack && ichdev->substream) {  in snd_intel8x0m_update()
493 		snd_pcm_period_elapsed(ichdev->substream);  in snd_intel8x0m_update()
496 	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);  in snd_intel8x0m_update()
502 	struct ichdev *ichdev;  in snd_intel8x0m_interrupt()  local
520 		ichdev = &chip->ichd[i];  in snd_intel8x0m_interrupt()
521 		if (status & ichdev->int_sta_mask)  in snd_intel8x0m_interrupt()
522 			snd_intel8x0m_update(chip, ichdev);  in snd_intel8x0m_interrupt()
539 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0m_pcm_trigger()  local
541 	unsigned long port = ichdev->reg_offset;  in snd_intel8x0m_pcm_trigger()
564 		while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;  in snd_intel8x0m_pcm_trigger()
585 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0m_pcm_pointer()  local
588 	ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift;  in snd_intel8x0m_pcm_pointer()
590 		ptr = ichdev->fragsize1 - ptr1;  in snd_intel8x0m_pcm_pointer()
593 	ptr += ichdev->position;  in snd_intel8x0m_pcm_pointer()
594 	if (ptr >= ichdev->size)  in snd_intel8x0m_pcm_pointer()
603 	struct ichdev *ichdev = get_ichdev(substream);  in snd_intel8x0m_pcm_prepare()  local
605 	ichdev->physbuf = runtime->dma_addr;  in snd_intel8x0m_pcm_prepare()
606 	ichdev->size = snd_pcm_lib_buffer_bytes(substream);  in snd_intel8x0m_pcm_prepare()
607 	ichdev->fragsize = snd_pcm_lib_period_bytes(substream);  in snd_intel8x0m_pcm_prepare()
608 	snd_ac97_write(ichdev->ac97, AC97_LINE1_RATE, runtime->rate);  in snd_intel8x0m_pcm_prepare()
609 	snd_ac97_write(ichdev->ac97, AC97_LINE1_LEVEL, 0);  in snd_intel8x0m_pcm_prepare()
610 	snd_intel8x0m_setup_periods(chip, ichdev);  in snd_intel8x0m_pcm_prepare()
636 static int snd_intel8x0m_pcm_open(struct snd_pcm_substream *substream, struct ichdev *ichdev)  in snd_intel8x0m_pcm_open()  argument
647 	ichdev->substream = substream;  in snd_intel8x0m_pcm_open()
653 	runtime->private_data = ichdev;  in snd_intel8x0m_pcm_open()
1121 	struct ichdev *ichdev;  in snd_intel8x0m_create()  local
1194 		ichdev = &chip->ichd[i];  in snd_intel8x0m_create()
1195 		ichdev->ichd = i;  in snd_intel8x0m_create()
1196 		ichdev->reg_offset = tbl[i].offset;  in snd_intel8x0m_create()
1197 		ichdev->int_sta_mask = tbl[i].int_sta_mask;  in snd_intel8x0m_create()
1200 			ichdev->roff_sr = ICH_REG_OFF_PICB;  in snd_intel8x0m_create()
1201 			ichdev->roff_picb = ICH_REG_OFF_SR;  in snd_intel8x0m_create()
1203 			ichdev->roff_sr = ICH_REG_OFF_SR;  in snd_intel8x0m_create()
1204 			ichdev->roff_picb = ICH_REG_OFF_PICB;  in snd_intel8x0m_create()
1207 			ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10;  in snd_intel8x0m_create()
1224 		ichdev = &chip->ichd[i];  in snd_intel8x0m_create()
1225 		ichdev->bdbar = ((u32 *)chip->bdbars.area) + (i * ICH_MAX_FRAGS * 2);  in snd_intel8x0m_create()
1226 		ichdev->bdbar_addr = chip->bdbars.addr + (i * sizeof(u32) * ICH_MAX_FRAGS * 2);  in snd_intel8x0m_create()
1227 		int_sta_masks |= ichdev->int_sta_mask;  in snd_intel8x0m_create()