Lines Matching refs:_sink

856 #define DSP_CHANNEL_MIXER_ROUTES(_sink) \  argument
857 { _sink, "DMIC2 Swapped Switch", "DMIC2" }, \
858 { _sink, "DMIC2 Switch", "DMIC2" }, \
859 { _sink, "ADC/DMIC1 Swapped Switch", "Decimator Mux" }, \
860 { _sink, "ADC/DMIC1 Switch", "Decimator Mux" }, \
861 { _sink, "AIF1 Switch", "AIF1 IN" }, \
862 { _sink, "AIF2 Switch", "AIF2 IN" }, \
863 { _sink, "AIF3 Switch", "AIF3 IN" }
865 #define DSP_OUTPUT_MIXER_ROUTES(_sink) \ argument
866 { _sink, "DSP Channel1 Switch", "DSP Channel1 Mixer" }, \
867 { _sink, "DSP Channel2 Switch", "DSP Channel2 Mixer" }, \
868 { _sink, "DSP Channel3 Switch", "DSP Channel3 Mixer" }, \
869 { _sink, "DSP Channel4 Switch", "DSP Channel4 Mixer" }, \
870 { _sink, "DSP Channel5 Switch", "DSP Channel5 Mixer" }
872 #define LEFT_OUTPUT_MIXER_ROUTES(_sink) \ argument
873 { _sink, "Right DAC2 Switch", "Right DAC2" }, \
874 { _sink, "Left DAC2 Switch", "Left DAC2" }, \
875 { _sink, "Right DAC1 Switch", "Right DAC1" }, \
876 { _sink, "Left DAC1 Switch", "Left DAC1" }, \
877 { _sink, "Input 1 Bypass Switch", "IN1PGA" }, \
878 { _sink, "Input 2 Bypass Switch", "IN2PGA" }, \
879 { _sink, "Input 3 Bypass Switch", "IN3PGA" }, \
880 { _sink, "Input 4 Bypass Switch", "IN4PGA" }
882 #define RIGHT_OUTPUT_MIXER_ROUTES(_sink) \ argument
883 { _sink, "Right DAC2 Switch", "Right DAC2" }, \
884 { _sink, "Left DAC2 Switch", "Left DAC2" }, \
885 { _sink, "Right DAC1 Switch", "Right DAC1" }, \
886 { _sink, "Left DAC1 Switch", "Left DAC1" }, \
887 { _sink, "Input 1 Bypass Switch", "IN1PGA" }, \
888 { _sink, "Input 2 Bypass Switch", "IN2PGA" }, \
889 { _sink, "Input 3 Bypass Switch", "IN3PGA" }, \
890 { _sink, "Input 4 Bypass Switch", "IN4PGA" }