331 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,  in wm_adsp_find_region()  argument
336 	for (i = 0; i < dsp->num_mems; i++)  in wm_adsp_find_region()
337 		if (dsp->mem[i].type == type)  in wm_adsp_find_region()
338 			return &dsp->mem[i];  in wm_adsp_find_region()
523 static int wm_adsp_load(struct wm_adsp *dsp)  in wm_adsp_load()  argument
527 	struct regmap *regmap = dsp->regmap;  in wm_adsp_load()
546 	snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,  in wm_adsp_load()
547 		 wm_adsp_fw[dsp->fw].file);  in wm_adsp_load()
550 	ret = request_firmware(&firmware, file, dsp->dev);  in wm_adsp_load()
552 		adsp_err(dsp, "Failed to request '%s'\n", file);  in wm_adsp_load()
559 		adsp_err(dsp, "%s: file too short, %zu bytes\n",  in wm_adsp_load()
567 		adsp_err(dsp, "%s: invalid magic\n", file);  in wm_adsp_load()
572 		adsp_err(dsp, "%s: unknown file format %d\n",  in wm_adsp_load()
576 	adsp_info(dsp, "Firmware version: %d\n", header->ver);  in wm_adsp_load()
578 	if (header->core != dsp->type) {  in wm_adsp_load()
579 		adsp_err(dsp, "%s: invalid core %d != %d\n",  in wm_adsp_load()
580 			 file, header->core, dsp->type);  in wm_adsp_load()
584 	switch (dsp->type) {  in wm_adsp_load()
591 		adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",  in wm_adsp_load()
603 		adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",  in wm_adsp_load()
617 		adsp_err(dsp, "%s: unexpected header length %d\n",  in wm_adsp_load()
622 	adsp_dbg(dsp, "%s: timestamp %llu\n", file,  in wm_adsp_load()
633 		mem = wm_adsp_find_region(dsp, type);  in wm_adsp_load()
671 			adsp_warn(dsp,  in wm_adsp_load()
677 		adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,  in wm_adsp_load()
683 			adsp_info(dsp, "%s: %s\n", file, text);  in wm_adsp_load()
692 				adsp_err(dsp, "Out of memory\n");  in wm_adsp_load()
700 				adsp_err(dsp,  in wm_adsp_load()
715 		adsp_err(dsp, "Failed to complete async write: %d\n", ret);  in wm_adsp_load()
720 		adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",  in wm_adsp_load()
781 static int wm_adsp_create_control(struct wm_adsp *dsp,  in wm_adsp_create_control()  argument
817 		 dsp->num, region_name, region->alg);  in wm_adsp_create_control()
819 	list_for_each_entry(ctl, &dsp->ctl_list,  in wm_adsp_create_control()
843 	ctl->adsp = dsp;  in wm_adsp_create_control()
858 	ctl_work->adsp = dsp;  in wm_adsp_create_control()
879 static int wm_adsp_setup_algs(struct wm_adsp *dsp)  in wm_adsp_setup_algs()  argument
881 	struct regmap *regmap = dsp->regmap;  in wm_adsp_setup_algs()
894 	switch (dsp->type) {  in wm_adsp_setup_algs()
896 		mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);  in wm_adsp_setup_algs()
899 		mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);  in wm_adsp_setup_algs()
909 	switch (dsp->type) {  in wm_adsp_setup_algs()
914 			adsp_err(dsp, "Failed to read algorithm info: %d\n",  in wm_adsp_setup_algs()
923 		dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);  in wm_adsp_setup_algs()
924 		adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",  in wm_adsp_setup_algs()
925 			  dsp->fw_id,  in wm_adsp_setup_algs()
937 		list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
945 		list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
955 			adsp_err(dsp, "Failed to read algorithm info: %d\n",  in wm_adsp_setup_algs()
964 		dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);  in wm_adsp_setup_algs()
965 		adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",  in wm_adsp_setup_algs()
966 			  dsp->fw_id,  in wm_adsp_setup_algs()
978 		list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
986 		list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
994 		list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
1006 		adsp_err(dsp, "No algorithms\n");  in wm_adsp_setup_algs()
1011 		adsp_err(dsp, "Algorithm count %zx excessive\n", algs);  in wm_adsp_setup_algs()
1012 		print_hex_dump_bytes(dev_name(dsp->dev), DUMP_PREFIX_OFFSET,  in wm_adsp_setup_algs()
1020 		adsp_err(dsp, "Failed to read algorithm list end: %d\n",  in wm_adsp_setup_algs()
1026 		adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",  in wm_adsp_setup_algs()
1035 		adsp_err(dsp, "Failed to read algorithm list: %d\n",  in wm_adsp_setup_algs()
1044 		switch (dsp->type) {  in wm_adsp_setup_algs()
1046 			adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",  in wm_adsp_setup_algs()
1063 			list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
1068 				wm_adsp_create_control(dsp, region);  in wm_adsp_setup_algs()
1070 				adsp_warn(dsp, "Missing length info for region DM with ID %x\n",  in wm_adsp_setup_algs()
1083 			list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
1088 				wm_adsp_create_control(dsp, region);  in wm_adsp_setup_algs()
1090 				adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",  in wm_adsp_setup_algs()
1096 			adsp_info(dsp,  in wm_adsp_setup_algs()
1115 			list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
1120 				wm_adsp_create_control(dsp, region);  in wm_adsp_setup_algs()
1122 				adsp_warn(dsp, "Missing length info for region XM with ID %x\n",  in wm_adsp_setup_algs()
1135 			list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
1140 				wm_adsp_create_control(dsp, region);  in wm_adsp_setup_algs()
1142 				adsp_warn(dsp, "Missing length info for region YM with ID %x\n",  in wm_adsp_setup_algs()
1155 			list_add_tail(&region->list, &dsp->alg_regions);  in wm_adsp_setup_algs()
1160 				wm_adsp_create_control(dsp, region);  in wm_adsp_setup_algs()
1162 				adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",  in wm_adsp_setup_algs()
1174 static int wm_adsp_load_coeff(struct wm_adsp *dsp)  in wm_adsp_load_coeff()  argument
1177 	struct regmap *regmap = dsp->regmap;  in wm_adsp_load_coeff()
1192 	snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,  in wm_adsp_load_coeff()
1193 		 wm_adsp_fw[dsp->fw].file);  in wm_adsp_load_coeff()
1196 	ret = request_firmware(&firmware, file, dsp->dev);  in wm_adsp_load_coeff()
1198 		adsp_warn(dsp, "Failed to request '%s'\n", file);  in wm_adsp_load_coeff()
1205 		adsp_err(dsp, "%s: file too short, %zu bytes\n",  in wm_adsp_load_coeff()
1212 		adsp_err(dsp, "%s: invalid magic\n", file);  in wm_adsp_load_coeff()
1220 		adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",  in wm_adsp_load_coeff()
1226 	adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,  in wm_adsp_load_coeff()
1241 		adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",  in wm_adsp_load_coeff()
1246 		adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",  in wm_adsp_load_coeff()
1260 			if (le32_to_cpu(blk->id) == dsp->fw_id &&  in wm_adsp_load_coeff()
1263 				mem = wm_adsp_find_region(dsp, type);  in wm_adsp_load_coeff()
1265 					adsp_err(dsp, "No ZM\n");  in wm_adsp_load_coeff()
1280 			adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",  in wm_adsp_load_coeff()
1284 			mem = wm_adsp_find_region(dsp, type);  in wm_adsp_load_coeff()
1286 				adsp_err(dsp, "No base for region %x\n", type);  in wm_adsp_load_coeff()
1292 					    &dsp->alg_regions, list) {  in wm_adsp_load_coeff()
1304 				adsp_err(dsp, "No %x for algorithm %x\n",  in wm_adsp_load_coeff()
1309 			adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",  in wm_adsp_load_coeff()
1319 				adsp_err(dsp, "Out of memory\n");  in wm_adsp_load_coeff()
1324 			adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",  in wm_adsp_load_coeff()
1330 				adsp_err(dsp,  in wm_adsp_load_coeff()
1342 		adsp_err(dsp, "Failed to complete async write: %d\n", ret);  in wm_adsp_load_coeff()
1345 		adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",  in wm_adsp_load_coeff()
1371 	struct wm_adsp *dsp = &dsps[w->shift];  in wm_adsp1_event()  local
1377 	dsp->card = codec->component.card;  in wm_adsp1_event()
1381 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1388 		if(dsp->sysclk_reg) {  in wm_adsp1_event()
1389 			ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);  in wm_adsp1_event()
1391 				adsp_err(dsp, "Failed to read SYSCLK state: %d\n",  in wm_adsp1_event()
1396 			val = (val & dsp->sysclk_mask)  in wm_adsp1_event()
1397 				>> dsp->sysclk_shift;  in wm_adsp1_event()
1399 			ret = regmap_update_bits(dsp->regmap,  in wm_adsp1_event()
1400 						 dsp->base + ADSP1_CONTROL_31,  in wm_adsp1_event()
1403 				adsp_err(dsp, "Failed to set clock rate: %d\n",  in wm_adsp1_event()
1409 		ret = wm_adsp_load(dsp);  in wm_adsp1_event()
1413 		ret = wm_adsp_setup_algs(dsp);  in wm_adsp1_event()
1417 		ret = wm_adsp_load_coeff(dsp);  in wm_adsp1_event()
1422 		ret = wm_coeff_init_control_caches(dsp);  in wm_adsp1_event()
1427 		ret = wm_coeff_sync_controls(dsp);  in wm_adsp1_event()
1432 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1439 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1442 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,  in wm_adsp1_event()
1445 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1448 		list_for_each_entry(ctl, &dsp->ctl_list, list)  in wm_adsp1_event()
1451 		while (!list_empty(&dsp->alg_regions)) {  in wm_adsp1_event()
1452 			alg_region = list_first_entry(&dsp->alg_regions,  in wm_adsp1_event()
1467 	regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,  in wm_adsp1_event()
1473 static int wm_adsp2_ena(struct wm_adsp *dsp)  in wm_adsp2_ena()  argument
1478 	ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,  in wm_adsp2_ena()
1485 		ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,  in wm_adsp2_ena()
1497 		adsp_err(dsp, "Failed to start DSP RAM\n");  in wm_adsp2_ena()
1501 	adsp_dbg(dsp, "RAM ready after %d polls\n", count);  in wm_adsp2_ena()
1508 	struct wm_adsp *dsp = container_of(work,  in wm_adsp2_boot_work()  local
1518 	ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);  in wm_adsp2_boot_work()
1520 		adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret);  in wm_adsp2_boot_work()
1526 	ret = regmap_update_bits_async(dsp->regmap,  in wm_adsp2_boot_work()
1527 				       dsp->base + ADSP2_CLOCKING,  in wm_adsp2_boot_work()
1530 		adsp_err(dsp, "Failed to set clock rate: %d\n", ret);  in wm_adsp2_boot_work()
1534 	if (dsp->dvfs) {  in wm_adsp2_boot_work()
1535 		ret = regmap_read(dsp->regmap,  in wm_adsp2_boot_work()
1536 				  dsp->base + ADSP2_CLOCKING, &val);  in wm_adsp2_boot_work()
1538 			adsp_err(dsp, "Failed to read clocking: %d\n", ret);  in wm_adsp2_boot_work()
1543 			ret = regulator_enable(dsp->dvfs);  in wm_adsp2_boot_work()
1545 				adsp_err(dsp,  in wm_adsp2_boot_work()
1551 			ret = regulator_set_voltage(dsp->dvfs,  in wm_adsp2_boot_work()
1555 				adsp_err(dsp,  in wm_adsp2_boot_work()
1563 	ret = wm_adsp2_ena(dsp);  in wm_adsp2_boot_work()
1567 	ret = wm_adsp_load(dsp);  in wm_adsp2_boot_work()
1571 	ret = wm_adsp_setup_algs(dsp);  in wm_adsp2_boot_work()
1575 	ret = wm_adsp_load_coeff(dsp);  in wm_adsp2_boot_work()
1580 	ret = wm_coeff_init_control_caches(dsp);  in wm_adsp2_boot_work()
1585 	ret = wm_coeff_sync_controls(dsp);  in wm_adsp2_boot_work()
1589 	dsp->running = true;  in wm_adsp2_boot_work()
1594 	regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,  in wm_adsp2_boot_work()
1603 	struct wm_adsp *dsp = &dsps[w->shift];  in wm_adsp2_early_event()  local
1605 	dsp->card = codec->component.card;  in wm_adsp2_early_event()
1609 		queue_work(system_unbound_wq, &dsp->boot_work);  in wm_adsp2_early_event()
1624 	struct wm_adsp *dsp = &dsps[w->shift];  in wm_adsp2_event()  local
1631 		flush_work(&dsp->boot_work);  in wm_adsp2_event()
1633 		if (!dsp->running)  in wm_adsp2_event()
1636 		ret = regmap_update_bits(dsp->regmap,  in wm_adsp2_event()
1637 					 dsp->base + ADSP2_CONTROL,  in wm_adsp2_event()
1645 		dsp->running = false;  in wm_adsp2_event()
1647 		regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,  in wm_adsp2_event()
1652 		regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);  in wm_adsp2_event()
1653 		regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);  in wm_adsp2_event()
1654 		regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);  in wm_adsp2_event()
1656 		if (dsp->dvfs) {  in wm_adsp2_event()
1657 			ret = regulator_set_voltage(dsp->dvfs, 1200000,  in wm_adsp2_event()
1660 				adsp_warn(dsp,  in wm_adsp2_event()
1664 			ret = regulator_disable(dsp->dvfs);  in wm_adsp2_event()
1666 				adsp_err(dsp,  in wm_adsp2_event()
1671 		list_for_each_entry(ctl, &dsp->ctl_list, list)  in wm_adsp2_event()
1674 		while (!list_empty(&dsp->alg_regions)) {  in wm_adsp2_event()
1675 			alg_region = list_first_entry(&dsp->alg_regions,  in wm_adsp2_event()
1682 		adsp_dbg(dsp, "Shutdown complete\n");  in wm_adsp2_event()
1691 	regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,  in wm_adsp2_event()