160 	struct virtio_pci_cfg_cap cfg_access;  member
1294 			     struct virtio_pci_cfg_cap *cfg_access)  in valid_bar_access()  argument
1297 	if (cfg_access->cap.bar != 0)  in valid_bar_access()
1301 	if (cfg_access->cap.offset >= d->mmio_size  in valid_bar_access()
1302 	    || cfg_access->cap.offset + cfg_access->cap.length > d->mmio_size)  in valid_bar_access()
1306 	if (cfg_access->cap.length != 1  in valid_bar_access()
1307 	    && cfg_access->cap.length != 2  in valid_bar_access()
1308 	    && cfg_access->cap.length != 4)  in valid_bar_access()
1317 	if (cfg_access->cap.offset % cfg_access->cap.length != 0)  in valid_bar_access()
1398 		   == (void *)&d->config.cfg_access.cap.bar  in pci_data_iowrite()
1400 		   == &d->config.cfg_access.cap.length  in pci_data_iowrite()
1402 		   == &d->config.cfg_access.cap.offset) {  in pci_data_iowrite()
1412 	} else if (&d->config_words[reg] == &d->config.cfg_access.pci_cfg_data) {  in pci_data_iowrite()
1425 		if (!valid_bar_access(d, &d->config.cfg_access))  in pci_data_iowrite()
1428 		iowrite(portoff, val, mask, &d->config.cfg_access.pci_cfg_data);  in pci_data_iowrite()
1434 		write_mask = (1ULL<<(8*d->config.cfg_access.cap.length)) - 1;  in pci_data_iowrite()
1436 			d->config.cfg_access.pci_cfg_data, write_mask,  in pci_data_iowrite()
1437 			d->config.cfg_access.cap.bar,  in pci_data_iowrite()
1438 			d->config.cfg_access.cap.offset,  in pci_data_iowrite()
1439 			d->config.cfg_access.cap.length);  in pci_data_iowrite()
1441 		emulate_mmio_write(d, d->config.cfg_access.cap.offset,  in pci_data_iowrite()
1442 				   d->config.cfg_access.pci_cfg_data,  in pci_data_iowrite()
1468 	if (&d->config_words[reg] == &d->config.cfg_access.pci_cfg_data) {  in pci_data_ioread()
1480 		if (!valid_bar_access(d, &d->config.cfg_access))  in pci_data_ioread()
1483 			     d->config.cfg_access.cap.bar,  in pci_data_ioread()
1484 			     d->config.cfg_access.cap.offset,  in pci_data_ioread()
1485 			     d->config.cfg_access.cap.length);  in pci_data_ioread()
1491 		read_mask = (1ULL<<(8*d->config.cfg_access.cap.length))-1;  in pci_data_ioread()
1492 		d->config.cfg_access.pci_cfg_data  in pci_data_ioread()
1494 					    d->config.cfg_access.cap.offset,  in pci_data_ioread()
1497 			d->config.cfg_access.pci_cfg_data, read_mask,  in pci_data_ioread()
1498 			d->config.cfg_access.cap.bar,  in pci_data_ioread()
1499 			d->config.cfg_access.cap.offset,  in pci_data_ioread()
1500 			d->config.cfg_access.cap.length);  in pci_data_ioread()
2442 	dev->config.cfg_access.cap.cap_next  in set_device_config()
2451 	assert(dev->config.cfg_access.cap.cap_next % 4 == 0);  in set_device_config()
2589 		 offsetof(struct pci_config, cfg_access));  in init_pci_config()
2598 	init_cap(&pci->cfg_access.cap, sizeof(pci->cfg_access),  in init_pci_config()