Lines Matching refs:pages
52 pages, pae, pse, pse36, cr0.wp, and 1GB pages. Work is in progress to support
102 Shadow pages
109 A nonleaf spte allows the hardware mmu to reach the leaf pages and
110 is not related to a translation directly. It points to other shadow pages.
115 Leaf ptes point at guest pages.
131 Shadow pages contain the following information:
137 Examples include real mode translation, large guest pages backed by small
138 host pages, and gpa->hpa translations when NPT or EPT is active.
147 so multiple shadow pages are needed to shadow one guest page.
148 For first-level shadow pages, role.quadrant can be 0 or 1 and denotes the
152 shadow pages) so role.quadrant takes values in the range 0..3. Each
170 (pages for which this is true are different from other pages; see the
174 (pages for which this is true are different from other pages; see the
190 sptes in spt point either at guest pages, or at lower-level shadow pages.
191 Specifically, if sp1 and sp2 are shadow pages, then sp1->spt[n] may point
194 guest pages as leaves.
206 parent_ptes bit 0 is zero, only one spte points at this pages and
215 other means. Valid for leaf pages.
217 How many sptes in the page point at pages that are unsync (or have
221 pages that may be unsynchronized. Used to quickly locate all unsychronized
222 pages reachable from a given page.
225 during hash table lookup, and used to skip invalidated shadow pages (see
226 "Zapping all pages" below.)
235 and unsynchronized pages" below). Leaf pages can be unsynchronized
248 Synchronized and unsynchronized pages
268 pages on a tlb flush.
281 - when logging dirty pages, memory is write protected
282 - synchronized shadow pages are write protected (*)
325 - synchronize newly reachable shadow pages
330 - synchronize newly reachable shadow pages
378 Large pages
381 The mmu supports all combinations of large and small guest and host pages.
382 Supported page sizes include 4k, 2M, 4M, and 1G. 4M pages are treated as
383 two separate 2M pages, on both guest and host, since the mmu always uses PAE
392 write-protected pages
401 Zapping all pages (page generation count)
404 For the large memory guests, walking and zapping all pages is really slow
405 (because there are a lot of pages), and also blocks memory accesses of
413 When KVM need zap all shadow pages sptes, it just simply increases the global
414 generation-number then reload root shadow pages on all vcpus. As the VCPUs
415 create new shadow page tables, the old pages are not used because of the
418 KVM then walks through all pages and zaps obsolete pages. While the zap
429 shadow pages, and is made more scalable with a similar technique.
443 pages are zapped when there is an overflow.