Lines Matching refs:PIN_INPUT
163 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
164 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
170 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
171 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
177 0x288 (PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
178 0x28c (PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
184 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi1_sclk */
185 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi1_d1 */
186 0x3ac (PIN_INPUT | MUX_MODE0) /* spi1_d0 */
195 0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */
206 0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
207 0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
213 0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */
214 0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */
215 0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
216 0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
229 0x4c (PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */
230 0x50 (PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */
231 0x74 (PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
232 0x78 (PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
233 0x7c (PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
234 0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
235 0x84 (PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
236 0x88 (PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
260 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
261 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
262 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
263 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
264 0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
265 0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
266 0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
267 0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
268 0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
269 0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
270 0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
271 0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
272 0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
273 0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
274 0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
275 0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
294 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxc.rgmii0_rxc */
295 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxctl.rgmii0_rxctl */
296 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd3.rgmii0_rxd3 */
297 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd2.rgmii0_rxd2 */
298 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd1.rgmii0_rxd1 */
299 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd0.rgmii0_rxd0 */
308 0x1b0 (PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
309 0x1b4 (PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
310 0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
311 0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
312 0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
313 0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */