Lines Matching refs:PIN_INPUT
152 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx */
159 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx */
181 … OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
182 … OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
183 … OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
184 … OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
185 … OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
186 … OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
187 … OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
188 … OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
192 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
195 … OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
201 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
202 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
208 0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
209 0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
215 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */
216 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */
282 0x05a (PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */
290 0x152 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
292 0x154 (PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
293 0x156 (PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
302 0x0b0 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */