151 	int idx;  in xscale1pmu_handle_irq()  local
173 	for (idx = 0; idx < cpu_pmu->num_events; ++idx) {  in xscale1pmu_handle_irq()
174 		struct perf_event *event = cpuc->events[idx];  in xscale1pmu_handle_irq()
180 		if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))  in xscale1pmu_handle_irq()
210 	int idx = hwc->idx;  in xscale1pmu_enable_event()  local
212 	switch (idx) {  in xscale1pmu_enable_event()
228 		WARN_ONCE(1, "invalid counter number (%d)\n", idx);  in xscale1pmu_enable_event()
246 	int idx = hwc->idx;  in xscale1pmu_disable_event()  local
248 	switch (idx) {  in xscale1pmu_disable_event()
262 		WARN_ONCE(1, "invalid counter number (%d)\n", idx);  in xscale1pmu_disable_event()
322 	int counter = hwc->idx;  in xscale1pmu_read_counter()
343 	int counter = hwc->idx;  in xscale1pmu_write_counter()
498 	int idx;  in xscale2pmu_handle_irq()  local
514 	for (idx = 0; idx < cpu_pmu->num_events; ++idx) {  in xscale2pmu_handle_irq()
515 		struct perf_event *event = cpuc->events[idx];  in xscale2pmu_handle_irq()
521 		if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))  in xscale2pmu_handle_irq()
551 	int idx = hwc->idx;  in xscale2pmu_enable_event()  local
556 	switch (idx) {  in xscale2pmu_enable_event()
581 		WARN_ONCE(1, "invalid counter number (%d)\n", idx);  in xscale2pmu_enable_event()
597 	int idx = hwc->idx;  in xscale2pmu_disable_event()  local
602 	switch (idx) {  in xscale2pmu_disable_event()
632 		WARN_ONCE(1, "invalid counter number (%d)\n", idx);  in xscale2pmu_disable_event()
647 	int idx = xscale1pmu_get_event_idx(cpuc, event);  in xscale2pmu_get_event_idx()  local
648 	if (idx >= 0)  in xscale2pmu_get_event_idx()
652 		idx = XSCALE_COUNTER3;  in xscale2pmu_get_event_idx()
654 		idx = XSCALE_COUNTER2;  in xscale2pmu_get_event_idx()
656 	return idx;  in xscale2pmu_get_event_idx()
686 	int counter = hwc->idx;  in xscale2pmu_read_counter()
713 	int counter = hwc->idx;  in xscale2pmu_write_counter()