Lines Matching refs:AARCH64_INSN_SF_BIT
35 #define AARCH64_INSN_SF_BIT BIT(31) macro
530 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_comp_branch_imm()
664 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_load_store_pair()
713 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_add_sub_imm()
758 insn |= AARCH64_INSN_SF_BIT | AARCH64_INSN_N_BIT; in aarch64_insn_gen_bitfield()
807 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_movewide()
855 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_add_sub_shifted_reg()
900 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_data1()
948 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_data2()
987 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_data3()
1049 insn |= AARCH64_INSN_SF_BIT; in aarch64_insn_gen_logical_shifted_reg()