Lines Matching refs:cpu_pmu

187 #define	ARMV8_IDX_COUNTER_LAST(cpu_pmu) \  argument
188 (ARMV8_IDX_CYCLE_COUNTER + cpu_pmu->num_events - 1)
254 static inline int armv8pmu_counter_valid(struct arm_pmu *cpu_pmu, int idx) in armv8pmu_counter_valid() argument
257 idx <= ARMV8_IDX_COUNTER_LAST(cpu_pmu); in armv8pmu_counter_valid()
276 struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); in armv8pmu_read_counter() local
281 if (!armv8pmu_counter_valid(cpu_pmu, idx)) in armv8pmu_read_counter()
294 struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); in armv8pmu_write_counter() local
298 if (!armv8pmu_counter_valid(cpu_pmu, idx)) in armv8pmu_write_counter()
366 struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); in armv8pmu_enable_event() local
367 struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); in armv8pmu_enable_event()
403 struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); in armv8pmu_disable_event() local
404 struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); in armv8pmu_disable_event()
429 struct arm_pmu *cpu_pmu = (struct arm_pmu *)dev; in armv8pmu_handle_irq() local
430 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in armv8pmu_handle_irq()
450 for (idx = 0; idx < cpu_pmu->num_events; ++idx) { in armv8pmu_handle_irq()
472 cpu_pmu->disable(event); in armv8pmu_handle_irq()
487 static void armv8pmu_start(struct arm_pmu *cpu_pmu) in armv8pmu_start() argument
490 struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); in armv8pmu_start()
498 static void armv8pmu_stop(struct arm_pmu *cpu_pmu) in armv8pmu_stop() argument
501 struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); in armv8pmu_stop()
513 struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); in armv8pmu_get_event_idx() local
529 for (idx = ARMV8_IDX_COUNTER0; idx < cpu_pmu->num_events; ++idx) { in armv8pmu_get_event_idx()
566 struct arm_pmu *cpu_pmu = (struct arm_pmu *)info; in armv8pmu_reset() local
567 u32 idx, nb_cnt = cpu_pmu->num_events; in armv8pmu_reset()
618 static void armv8_pmu_init(struct arm_pmu *cpu_pmu) in armv8_pmu_init() argument
620 cpu_pmu->handle_irq = armv8pmu_handle_irq, in armv8_pmu_init()
621 cpu_pmu->enable = armv8pmu_enable_event, in armv8_pmu_init()
622 cpu_pmu->disable = armv8pmu_disable_event, in armv8_pmu_init()
623 cpu_pmu->read_counter = armv8pmu_read_counter, in armv8_pmu_init()
624 cpu_pmu->write_counter = armv8pmu_write_counter, in armv8_pmu_init()
625 cpu_pmu->get_event_idx = armv8pmu_get_event_idx, in armv8_pmu_init()
626 cpu_pmu->start = armv8pmu_start, in armv8_pmu_init()
627 cpu_pmu->stop = armv8pmu_stop, in armv8_pmu_init()
628 cpu_pmu->reset = armv8pmu_reset, in armv8_pmu_init()
629 cpu_pmu->max_period = (1LLU << 32) - 1, in armv8_pmu_init()
630 cpu_pmu->set_event_filter = armv8pmu_set_event_filter; in armv8_pmu_init()
633 static int armv8_pmuv3_init(struct arm_pmu *cpu_pmu) in armv8_pmuv3_init() argument
635 armv8_pmu_init(cpu_pmu); in armv8_pmuv3_init()
636 cpu_pmu->name = "armv8_pmuv3"; in armv8_pmuv3_init()
637 cpu_pmu->map_event = armv8_pmuv3_map_event; in armv8_pmuv3_init()
638 return armv8pmu_probe_num_events(cpu_pmu); in armv8_pmuv3_init()
641 static int armv8_a53_pmu_init(struct arm_pmu *cpu_pmu) in armv8_a53_pmu_init() argument
643 armv8_pmu_init(cpu_pmu); in armv8_a53_pmu_init()
644 cpu_pmu->name = "armv8_cortex_a53"; in armv8_a53_pmu_init()
645 cpu_pmu->map_event = armv8_a53_map_event; in armv8_a53_pmu_init()
646 return armv8pmu_probe_num_events(cpu_pmu); in armv8_a53_pmu_init()
649 static int armv8_a57_pmu_init(struct arm_pmu *cpu_pmu) in armv8_a57_pmu_init() argument
651 armv8_pmu_init(cpu_pmu); in armv8_a57_pmu_init()
652 cpu_pmu->name = "armv8_cortex_a57"; in armv8_a57_pmu_init()
653 cpu_pmu->map_event = armv8_a57_map_event; in armv8_a57_pmu_init()
654 return armv8pmu_probe_num_events(cpu_pmu); in armv8_a57_pmu_init()