Lines Matching refs:add
46 add x3, x2, #CPU_XREG_OFFSET(19)
82 add x3, x2, #CPU_XREG_OFFSET(31) // SP_EL0
90 add x3, x2, #CPU_XREG_OFFSET(19)
110 add x3, x2, #CPU_GP_REG_OFFSET(CPU_FP_REGS)
117 add x3, x2, #CPU_GP_REG_OFFSET(CPU_FP_REGS)
129 add x3, x2, #CPU_XREG_OFFSET(4)
142 add x3, x2, #CPU_XREG_OFFSET(0)
155 add x3, x2, #CPU_XREG_OFFSET(0)
195 add x3, x2, #CPU_SYSREG_OFFSET(MPIDR_EL1)
239 add x22, x22, x5, lsl #2
260 add x22, x22, x5, lsl #2
285 add x3, x2, #CPU_SYSREG_OFFSET(MPIDR_EL1)
329 add x22, x22, x5, lsl #2
350 add x22, x22, x5, lsl #2
399 add x25, x0, #VCPU_CONTEXT
423 add x3, x2, #CPU_SPSR_OFFSET(KVM_SPSR_ABT)
431 add x3, x2, #CPU_SYSREG_OFFSET(DACR32_EL2)
449 add x3, x2, #CPU_SPSR_OFFSET(KVM_SPSR_ABT)
457 add x3, x2, #CPU_SYSREG_OFFSET(DACR32_EL2)
626 add x4, x3, #DEBUG_BCR
628 add x4, x3, #DEBUG_BVR
632 add x4, x3, #DEBUG_WCR
634 add x4, x3, #DEBUG_WVR
655 add x4, x3, #DEBUG_BCR
657 add x4, x3, #DEBUG_BVR
661 add x4, x3, #DEBUG_WCR
663 add x4, x3, #DEBUG_WVR
695 add x2, x0, #VCPU_CONTEXT
731 add x3, x0, #VCPU_HOST_DEBUG_STATE
741 add x2, x0, #VCPU_CONTEXT
763 add x2, x0, #VCPU_CONTEXT
796 add x3, x0, #VCPU_HOST_DEBUG_STATE
899 add x0, x0, x3