Lines Matching refs:irq

116 	bfin_irq_flags &= ~(1 << d->irq);  in bfin_core_mask_irq()
123 bfin_irq_flags |= 1 << d->irq; in bfin_core_unmask_irq()
139 void bfin_internal_mask_irq(unsigned int irq) in bfin_internal_mask_irq() argument
143 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_mask_irq()
144 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32; in bfin_internal_mask_irq()
153 ~(1 << BFIN_SYSIRQ(irq))); in bfin_internal_mask_irq()
160 bfin_internal_mask_irq(d->irq); in bfin_internal_mask_irq_chip()
164 void bfin_internal_unmask_irq_affinity(unsigned int irq, in bfin_internal_unmask_irq_affinity() argument
167 void bfin_internal_unmask_irq(unsigned int irq) in bfin_internal_unmask_irq_affinity()
173 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_unmask_irq_affinity()
174 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32; in bfin_internal_unmask_irq_affinity()
189 (1 << BFIN_SYSIRQ(irq))); in bfin_internal_unmask_irq_affinity()
197 bfin_internal_unmask_irq_affinity(d->irq, in bfin_internal_unmask_irq_chip()
204 bfin_internal_mask_irq(d->irq); in bfin_internal_set_affinity()
205 bfin_internal_unmask_irq_affinity(d->irq, mask); in bfin_internal_set_affinity()
212 bfin_internal_unmask_irq(d->irq); in bfin_internal_unmask_irq_chip()
217 int bfin_internal_set_wake(unsigned int irq, unsigned int state) in bfin_internal_set_wake() argument
221 bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_set_wake()
222 bit = BFIN_SYSIRQ(irq) % 32; in bfin_internal_set_wake()
224 switch (irq) { in bfin_internal_set_wake()
272 return bfin_internal_set_wake(d->irq, state); in bfin_internal_set_wake_chip()
275 inline int bfin_internal_set_wake(unsigned int irq, unsigned int state) in bfin_internal_set_wake() argument
286 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_preflow_handler()
296 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_mask_ack_irq()
306 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_unmask_irq()
374 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_enable()
385 unsigned int sid = BFIN_SYSIRQ(d->irq); in bfin_sec_disable()
410 void bfin_sec_raise_irq(unsigned int irq) in bfin_sec_raise_irq() argument
413 unsigned int sid = BFIN_SYSIRQ(irq); in bfin_sec_raise_irq()
491 static irqreturn_t bfin_fault_routine(int irq, void *data) in bfin_fault_routine() argument
495 switch (irq) { in bfin_fault_routine()
516 panic("Unknown fault %d", irq); in bfin_fault_routine()
553 void bfin_handle_irq(unsigned irq) in bfin_handle_irq() argument
557 ipipe_trace_irq_entry(irq); in bfin_handle_irq()
558 __ipipe_handle_irq(irq, &regs); in bfin_handle_irq()
559 ipipe_trace_irq_exit(irq); in bfin_handle_irq()
561 generic_handle_irq(irq); in bfin_handle_irq()
568 static void bfin_mac_status_ack_irq(unsigned int irq) in bfin_mac_status_ack_irq() argument
570 switch (irq) { in bfin_mac_status_ack_irq()
595 bfin_write_EMAC_SYSTAT(1L << (irq - IRQ_MAC_PHYINT)); in bfin_mac_status_ack_irq()
602 unsigned int irq = d->irq; in bfin_mac_status_mask_irq() local
604 mac_stat_int_mask &= ~(1L << (irq - IRQ_MAC_PHYINT)); in bfin_mac_status_mask_irq()
606 switch (irq) { in bfin_mac_status_mask_irq()
617 bfin_mac_status_ack_irq(irq); in bfin_mac_status_mask_irq()
622 unsigned int irq = d->irq; in bfin_mac_status_unmask_irq() local
625 switch (irq) { in bfin_mac_status_unmask_irq()
636 mac_stat_int_mask |= 1L << (irq - IRQ_MAC_PHYINT); in bfin_mac_status_unmask_irq()
661 int i, irq = 0; in bfin_demux_mac_status_irq() local
666 irq = IRQ_MAC_PHYINT + i; in bfin_demux_mac_status_irq()
670 if (irq) { in bfin_demux_mac_status_irq()
671 if (mac_stat_int_mask & (1L << (irq - IRQ_MAC_PHYINT))) { in bfin_demux_mac_status_irq()
672 bfin_handle_irq(irq); in bfin_demux_mac_status_irq()
674 bfin_mac_status_ack_irq(irq); in bfin_demux_mac_status_irq()
677 irq); in bfin_demux_mac_status_irq()
705 set_gpio_data(irq_to_gpio(d->irq), 0); in bfin_gpio_ack_irq()
710 unsigned int irq = d->irq; in bfin_gpio_mask_ack_irq() local
711 u32 gpionr = irq_to_gpio(irq); in bfin_gpio_mask_ack_irq()
721 set_gpio_maska(irq_to_gpio(d->irq), 0); in bfin_gpio_mask_irq()
726 set_gpio_maska(irq_to_gpio(d->irq), 1); in bfin_gpio_unmask_irq()
731 u32 gpionr = irq_to_gpio(d->irq); in bfin_gpio_irq_startup()
743 u32 gpionr = irq_to_gpio(d->irq); in bfin_gpio_irq_shutdown()
752 unsigned int irq = d->irq; in bfin_gpio_irq_type() local
755 u32 gpionr = irq_to_gpio(irq); in bfin_gpio_irq_type()
767 snprintf(buf, 16, "gpio-irq%d", irq); in bfin_gpio_irq_type()
812 static void bfin_demux_gpio_block(unsigned int irq) in bfin_demux_gpio_block() argument
816 gpio = irq_to_gpio(irq); in bfin_demux_gpio_block()
821 bfin_handle_irq(irq); in bfin_demux_gpio_block()
822 irq++; in bfin_demux_gpio_block()
830 unsigned int irq; in bfin_demux_gpio_irq() local
836 irq = IRQ_PG0; in bfin_demux_gpio_irq()
839 irq = IRQ_PH0; in bfin_demux_gpio_irq()
843 irq = IRQ_PF0; in bfin_demux_gpio_irq()
847 irq = IRQ_PF0; in bfin_demux_gpio_irq()
851 irq = IRQ_PF0; in bfin_demux_gpio_irq()
854 irq = IRQ_PG0; in bfin_demux_gpio_irq()
857 irq = IRQ_PH0; in bfin_demux_gpio_irq()
861 irq = IRQ_PF0; in bfin_demux_gpio_irq()
864 irq = IRQ_PF16; in bfin_demux_gpio_irq()
867 irq = IRQ_PF32; in bfin_demux_gpio_irq()
875 bfin_demux_gpio_block(irq); in bfin_demux_gpio_irq()
882 return bfin_gpio_pm_wakeup_ctrl(irq_to_gpio(d->irq), state); in bfin_gpio_set_wake()
972 int irq; in init_arch_irq() local
992 for (irq = 0; irq <= SYS_IRQS; irq++) { in init_arch_irq()
993 if (irq <= IRQ_CORETMR) in init_arch_irq()
994 irq_set_chip(irq, &bfin_core_irqchip); in init_arch_irq()
996 irq_set_chip(irq, &bfin_internal_irqchip); in init_arch_irq()
998 switch (irq) { in init_arch_irq()
1016 irq_set_chained_handler(irq, bfin_demux_gpio_irq); in init_arch_irq()
1021 irq_set_chained_handler(irq, in init_arch_irq()
1028 irq_set_handler(irq, handle_percpu_irq); in init_arch_irq()
1035 irq_set_handler(irq, handle_percpu_irq); in init_arch_irq()
1037 irq_set_handler(irq, handle_simple_irq); in init_arch_irq()
1044 irq_set_handler(irq, handle_simple_irq); in init_arch_irq()
1050 irq_set_handler(irq, handle_level_irq); in init_arch_irq()
1052 irq_set_handler(irq, handle_simple_irq); in init_arch_irq()
1061 for (irq = IRQ_MAC_PHYINT; irq <= IRQ_MAC_STMDONE; irq++) in init_arch_irq()
1062 irq_set_chip_and_handler(irq, &bfin_mac_status_irqchip, in init_arch_irq()
1067 for (irq = GPIO_IRQ_BASE; in init_arch_irq()
1068 irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++) in init_arch_irq()
1069 irq_set_chip_and_handler(irq, &bfin_gpio_irqchip, in init_arch_irq()
1167 int irq; in init_arch_irq() local
1174 for (irq = 0; irq <= SYS_IRQS; irq++) { in init_arch_irq()
1175 if (irq <= IRQ_CORETMR) { in init_arch_irq()
1176 irq_set_chip_and_handler(irq, &bfin_core_irqchip, in init_arch_irq()
1179 if (irq == IRQ_CORETMR) in init_arch_irq()
1180 irq_set_handler(irq, handle_percpu_irq); in init_arch_irq()
1182 } else if (irq >= BFIN_IRQ(34) && irq <= BFIN_IRQ(37)) { in init_arch_irq()
1183 irq_set_chip_and_handler(irq, &bfin_sec_irqchip, in init_arch_irq()
1186 irq_set_chip(irq, &bfin_sec_irqchip); in init_arch_irq()
1187 irq_set_handler(irq, handle_fasteoi_irq); in init_arch_irq()
1188 __irq_set_preflow_handler(irq, bfin_sec_preflow_handler); in init_arch_irq()
1251 int irq = vec_to_irq(vec); in do_irq() local
1252 if (irq == -1) in do_irq()
1254 asm_do_IRQ(irq, fp); in do_irq()
1259 int __ipipe_get_irq_priority(unsigned irq) in __ipipe_get_irq_priority() argument
1263 if (irq <= IRQ_CORETMR) in __ipipe_get_irq_priority()
1264 return irq; in __ipipe_get_irq_priority()
1267 if (irq >= BFIN_IRQ(0)) in __ipipe_get_irq_priority()
1272 if (ivg->irqno == irq) { in __ipipe_get_irq_priority()
1293 int irq, s = 0; in __ipipe_grab_irq() local
1295 irq = vec_to_irq(vec); in __ipipe_grab_irq()
1296 if (irq == -1) in __ipipe_grab_irq()
1299 if (irq == IRQ_SYSTMR) { in __ipipe_grab_irq()
1332 ipipe_trace_irq_entry(irq); in __ipipe_grab_irq()
1333 __ipipe_handle_irq(irq, regs); in __ipipe_grab_irq()
1334 ipipe_trace_irq_exit(irq); in __ipipe_grab_irq()