32 static struct clk *clks[3];  variable
34 	.clks = clks,
35 	.clk_num = ARRAY_SIZE(clks),
82 	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);  in ar71xx_clocks_init()
83 	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);  in ar71xx_clocks_init()
84 	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);  in ar71xx_clocks_init()
118 	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);  in ar724x_clocks_init()
119 	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);  in ar724x_clocks_init()
120 	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);  in ar724x_clocks_init()
151 	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);  in ar913x_clocks_init()
152 	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);  in ar913x_clocks_init()
153 	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);  in ar913x_clocks_init()
213 	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);  in ar933x_clocks_init()
214 	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);  in ar933x_clocks_init()
215 	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);  in ar933x_clocks_init()
347 	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);  in ar934x_clocks_init()
348 	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);  in ar934x_clocks_init()
349 	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);  in ar934x_clocks_init()
434 	clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);  in qca955x_clocks_init()
435 	clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);  in qca955x_clocks_init()
436 	clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);  in qca955x_clocks_init()