52 	unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;  in ar71xx_misc_irq_unmask()  local
57 	__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);  in ar71xx_misc_irq_unmask()
65 	unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;  in ar71xx_misc_irq_mask()  local
70 	__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);  in ar71xx_misc_irq_mask()
78 	unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;  in ar724x_misc_irq_ack()  local
83 	__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);  in ar724x_misc_irq_ack()
240 	int irq;  in plat_irq_dispatch()  local
251 		irq = fls(pending) - 1;  in plat_irq_dispatch()
252 		if (irq < ARRAY_SIZE(irq_wb_chan) && irq_wb_chan[irq] != -1)  in plat_irq_dispatch()
253 			ath79_ddr_wb_flush(irq_wb_chan[irq]);  in plat_irq_dispatch()
254 		do_IRQ(MIPS_CPU_IRQ_BASE + irq);  in plat_irq_dispatch()
255 		pending &= ~BIT(irq);  in plat_irq_dispatch()
260 static int misc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)  in misc_map()  argument
262 	irq_set_chip_and_handler(irq, &ath79_misc_irq_chip, handle_level_irq);  in misc_map()
276 	int irq;  in ath79_misc_intc_of_init()  local
278 	irq = irq_of_parse_and_map(node, 0);  in ath79_misc_intc_of_init()
279 	if (!irq)  in ath79_misc_intc_of_init()
292 	irq_set_chained_handler(irq, ath79_misc_irq_handler);  in ath79_misc_intc_of_init()
328 		u32 irq = i;  in ar79_cpu_intc_of_init()  local
331 			node, "qca,ddr-wb-channel-interrupts", i, &irq);  in ar79_cpu_intc_of_init()
332 		if (irq >= ARRAY_SIZE(irq_wb_chan))  in ar79_cpu_intc_of_init()
342 		irq_wb_chan[irq] = args.args[0];  in ar79_cpu_intc_of_init()
344 			irq, args.args[0]);  in ar79_cpu_intc_of_init()