32 static struct ipic * primary_ipic;
518 static inline struct ipic * ipic_from_irq(unsigned int virq)  in ipic_from_irq()
525 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_unmask_irq()  local
532 	temp = ipic_read(ipic->regs, ipic_info[src].mask);  in ipic_unmask_irq()
534 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_unmask_irq()
541 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_mask_irq()  local
548 	temp = ipic_read(ipic->regs, ipic_info[src].mask);  in ipic_mask_irq()
550 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_mask_irq()
561 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_ack_irq()  local
569 	ipic_write(ipic->regs, ipic_info[src].ack, temp);  in ipic_ack_irq()
580 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_mask_irq_and_ack()  local
587 	temp = ipic_read(ipic->regs, ipic_info[src].mask);  in ipic_mask_irq_and_ack()
589 	ipic_write(ipic->regs, ipic_info[src].mask, temp);  in ipic_mask_irq_and_ack()
592 	ipic_write(ipic->regs, ipic_info[src].ack, temp);  in ipic_mask_irq_and_ack()
603 	struct ipic *ipic = ipic_from_irq(d->irq);  in ipic_set_irq_type()  local
645 	vold = ipic_read(ipic->regs, IPIC_SECNR);  in ipic_set_irq_type()
652 		ipic_write(ipic->regs, IPIC_SECNR, vnew);  in ipic_set_irq_type()
685 	struct ipic *ipic = h->host_data;  in ipic_host_map()  local
687 	irq_set_chip_data(virq, ipic);  in ipic_host_map()
702 struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)  in ipic_init()
704 	struct ipic	*ipic;  in ipic_init()  local
712 	ipic = kzalloc(sizeof(*ipic), GFP_KERNEL);  in ipic_init()
713 	if (ipic == NULL)  in ipic_init()
716 	ipic->irqhost = irq_domain_add_linear(node, NR_IPIC_INTS,  in ipic_init()
717 					      &ipic_host_ops, ipic);  in ipic_init()
718 	if (ipic->irqhost == NULL) {  in ipic_init()
719 		kfree(ipic);  in ipic_init()
723 	ipic->regs = ioremap(res.start, resource_size(&res));  in ipic_init()
726 	ipic_write(ipic->regs, IPIC_SICNR, 0x0);  in ipic_init()
743 	ipic_write(ipic->regs, IPIC_SICFR, temp);  in ipic_init()
749 	ipic_write(ipic->regs, IPIC_SERCR, temp);  in ipic_init()
752 	temp = ipic_read(ipic->regs, IPIC_SEMSR);  in ipic_init()
759 	ipic_write(ipic->regs, IPIC_SEMSR, temp);  in ipic_init()
761 	primary_ipic = ipic;  in ipic_init()
764 	ipic_write(ipic->regs, IPIC_SIMSR_H, 0);  in ipic_init()
765 	ipic_write(ipic->regs, IPIC_SIMSR_L, 0);  in ipic_init()
770 	return ipic;  in ipic_init()
775 	struct ipic *ipic = ipic_from_irq(virq);  in ipic_set_priority()  local
786 	temp = ipic_read(ipic->regs, ipic_info[src].prio);  in ipic_set_priority()
796 	ipic_write(ipic->regs, ipic_info[src].prio, temp);  in ipic_set_priority()
803 	struct ipic *ipic = ipic_from_irq(virq);  in ipic_set_highest_priority()  local
807 	temp = ipic_read(ipic->regs, IPIC_SICFR);  in ipic_set_highest_priority()
813 	ipic_write(ipic->regs, IPIC_SICFR, temp);  in ipic_set_highest_priority()
828 	struct ipic *ipic = primary_ipic;  in ipic_enable_mcp()  local
831 	temp = ipic_read(ipic->regs, IPIC_SERMR);  in ipic_enable_mcp()
833 	ipic_write(ipic->regs, IPIC_SERMR, temp);  in ipic_enable_mcp()
838 	struct ipic *ipic = primary_ipic;  in ipic_disable_mcp()  local
841 	temp = ipic_read(ipic->regs, IPIC_SERMR);  in ipic_disable_mcp()
843 	ipic_write(ipic->regs, IPIC_SERMR, temp);  in ipic_disable_mcp()
887 	struct ipic *ipic = primary_ipic;  in ipic_suspend()  local
889 	ipic_saved_state.sicfr = ipic_read(ipic->regs, IPIC_SICFR);  in ipic_suspend()
890 	ipic_saved_state.siprr[0] = ipic_read(ipic->regs, IPIC_SIPRR_A);  in ipic_suspend()
891 	ipic_saved_state.siprr[1] = ipic_read(ipic->regs, IPIC_SIPRR_D);  in ipic_suspend()
892 	ipic_saved_state.simsr[0] = ipic_read(ipic->regs, IPIC_SIMSR_H);  in ipic_suspend()
893 	ipic_saved_state.simsr[1] = ipic_read(ipic->regs, IPIC_SIMSR_L);  in ipic_suspend()
894 	ipic_saved_state.sicnr = ipic_read(ipic->regs, IPIC_SICNR);  in ipic_suspend()
895 	ipic_saved_state.smprr[0] = ipic_read(ipic->regs, IPIC_SMPRR_A);  in ipic_suspend()
896 	ipic_saved_state.smprr[1] = ipic_read(ipic->regs, IPIC_SMPRR_B);  in ipic_suspend()
897 	ipic_saved_state.semsr = ipic_read(ipic->regs, IPIC_SEMSR);  in ipic_suspend()
898 	ipic_saved_state.secnr = ipic_read(ipic->regs, IPIC_SECNR);  in ipic_suspend()
899 	ipic_saved_state.sermr = ipic_read(ipic->regs, IPIC_SERMR);  in ipic_suspend()
900 	ipic_saved_state.sercr = ipic_read(ipic->regs, IPIC_SERCR);  in ipic_suspend()
907 		ipic_write(ipic->regs, IPIC_SIMSR_H, 0);  in ipic_suspend()
908 		ipic_write(ipic->regs, IPIC_SIMSR_L, 0);  in ipic_suspend()
909 		ipic_write(ipic->regs, IPIC_SEMSR, 0);  in ipic_suspend()
910 		ipic_write(ipic->regs, IPIC_SERMR, 0);  in ipic_suspend()
918 	struct ipic *ipic = primary_ipic;  in ipic_resume()  local
920 	ipic_write(ipic->regs, IPIC_SICFR, ipic_saved_state.sicfr);  in ipic_resume()
921 	ipic_write(ipic->regs, IPIC_SIPRR_A, ipic_saved_state.siprr[0]);  in ipic_resume()
922 	ipic_write(ipic->regs, IPIC_SIPRR_D, ipic_saved_state.siprr[1]);  in ipic_resume()
923 	ipic_write(ipic->regs, IPIC_SIMSR_H, ipic_saved_state.simsr[0]);  in ipic_resume()
924 	ipic_write(ipic->regs, IPIC_SIMSR_L, ipic_saved_state.simsr[1]);  in ipic_resume()
925 	ipic_write(ipic->regs, IPIC_SICNR, ipic_saved_state.sicnr);  in ipic_resume()
926 	ipic_write(ipic->regs, IPIC_SMPRR_A, ipic_saved_state.smprr[0]);  in ipic_resume()
927 	ipic_write(ipic->regs, IPIC_SMPRR_B, ipic_saved_state.smprr[1]);  in ipic_resume()
928 	ipic_write(ipic->regs, IPIC_SEMSR, ipic_saved_state.semsr);  in ipic_resume()
929 	ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr);  in ipic_resume()
930 	ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr);  in ipic_resume()
931 	ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr);  in ipic_resume()