904 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x68782800);  in ppc440speA_pciex_init_utl()
1031 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0);  in ppc460ex_pciex_init_utl()
1333 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, 0x10000000);  /* guarded on */  in ppc405ex_pciex_init_port_hw()
1342 	dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0);  in ppc405ex_pciex_init_utl()
1474 	dcr_write(port->dcrs, DCRO_PEGPL_CFGBAH,  in ppc4xx_pciex_port_init_mapping()
1476 	dcr_write(port->dcrs, DCRO_PEGPL_CFGBAL,  in ppc4xx_pciex_port_init_mapping()
1480 	dcr_write(port->dcrs, DCRO_PEGPL_CFGMSK, 0xe0000001);  in ppc4xx_pciex_port_init_mapping()
1483 	dcr_write(port->dcrs, DCRO_PEGPL_REGBAH,  in ppc4xx_pciex_port_init_mapping()
1485 	dcr_write(port->dcrs, DCRO_PEGPL_REGBAL,  in ppc4xx_pciex_port_init_mapping()
1489 	dcr_write(port->dcrs, DCRO_PEGPL_REGMSK, 0x00007001);  in ppc4xx_pciex_port_init_mapping()
1492 	dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1493 	dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1494 	dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, 0);  in ppc4xx_pciex_port_init_mapping()
1495 	dcr_write(port->dcrs, DCRO_PEGPL_MSGMSK, 0);  in ppc4xx_pciex_port_init_mapping()
1633 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA);  in ppc4xx_pciex_read_config()
1663 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);  in ppc4xx_pciex_read_config()
1688 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg | GPL_DMER_MASK_DISA);  in ppc4xx_pciex_write_config()
1707 	dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);  in ppc4xx_pciex_write_config()
1750 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1751 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1752 		dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1755 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1762 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1766 			dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,  in ppc4xx_setup_one_pciex_POM()
1773 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1774 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1775 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1776 		dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL,  in ppc4xx_setup_one_pciex_POM()
1782 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAH, lah);  in ppc4xx_setup_one_pciex_POM()
1783 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal);  in ppc4xx_setup_one_pciex_POM()
1784 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff);  in ppc4xx_setup_one_pciex_POM()
1786 		dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL,  in ppc4xx_setup_one_pciex_POM()