Lines Matching refs:csr_core
98 void __iomem *csr_core; /* Core CSR address of IP */ member
600 writel(0, ctx->csr_core + INTSTATUSMASK); in xgene_ahci_hw_init()
601 val = readl(ctx->csr_core + INTSTATUSMASK); /* Force a barrier */ in xgene_ahci_hw_init()
605 writel(0x0, ctx->csr_core + ERRINTSTATUSMASK); in xgene_ahci_hw_init()
606 readl(ctx->csr_core + ERRINTSTATUSMASK); /* Force a barrier */ in xgene_ahci_hw_init()
611 writel(0xffffffff, ctx->csr_core + SLVRDERRATTRIBUTES); in xgene_ahci_hw_init()
612 writel(0xffffffff, ctx->csr_core + SLVWRERRATTRIBUTES); in xgene_ahci_hw_init()
613 writel(0xffffffff, ctx->csr_core + MSTRDERRATTRIBUTES); in xgene_ahci_hw_init()
614 writel(0xffffffff, ctx->csr_core + MSTWRERRATTRIBUTES); in xgene_ahci_hw_init()
617 val = readl(ctx->csr_core + BUSCTLREG); in xgene_ahci_hw_init()
620 writel(val, ctx->csr_core + BUSCTLREG); in xgene_ahci_hw_init()
622 val = readl(ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
625 writel(val, ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
626 val = readl(ctx->csr_core + IOFMSTRWAUX); in xgene_ahci_hw_init()
694 ctx->csr_core = devm_ioremap_resource(dev, res); in xgene_ahci_probe()
695 if (IS_ERR(ctx->csr_core)) in xgene_ahci_probe()
696 return PTR_ERR(ctx->csr_core); in xgene_ahci_probe()
749 dev_dbg(dev, "VAddr 0x%p Mmio VAddr 0x%p\n", ctx->csr_core, in xgene_ahci_probe()