282 	void __iomem *mmio = ctx->hpriv->mmio;  in xgene_ahci_set_phy_cfg()  local
286 		mmio, channel);  in xgene_ahci_set_phy_cfg()
287 	val = readl(mmio + PORTCFG);  in xgene_ahci_set_phy_cfg()
289 	writel(val, mmio + PORTCFG);  in xgene_ahci_set_phy_cfg()
290 	readl(mmio + PORTCFG);  /* Force a barrier */  in xgene_ahci_set_phy_cfg()
292 	writel(0x0001fffe, mmio + PORTPHY1CFG);  in xgene_ahci_set_phy_cfg()
293 	readl(mmio + PORTPHY1CFG); /* Force a barrier */  in xgene_ahci_set_phy_cfg()
294 	writel(0x28183219, mmio + PORTPHY2CFG);  in xgene_ahci_set_phy_cfg()
295 	readl(mmio + PORTPHY2CFG); /* Force a barrier */  in xgene_ahci_set_phy_cfg()
296 	writel(0x13081008, mmio + PORTPHY3CFG);  in xgene_ahci_set_phy_cfg()
297 	readl(mmio + PORTPHY3CFG); /* Force a barrier */  in xgene_ahci_set_phy_cfg()
298 	writel(0x00480815, mmio + PORTPHY4CFG);  in xgene_ahci_set_phy_cfg()
299 	readl(mmio + PORTPHY4CFG); /* Force a barrier */  in xgene_ahci_set_phy_cfg()
301 	val = readl(mmio + PORTPHY5CFG);  in xgene_ahci_set_phy_cfg()
303 	writel(val, mmio + PORTPHY5CFG);  in xgene_ahci_set_phy_cfg()
304 	readl(mmio + PORTPHY5CFG); /* Force a barrier */  in xgene_ahci_set_phy_cfg()
305 	val = readl(mmio + PORTAXICFG);  in xgene_ahci_set_phy_cfg()
308 	writel(val, mmio + PORTAXICFG);  in xgene_ahci_set_phy_cfg()
309 	readl(mmio + PORTAXICFG); /* Force a barrier */  in xgene_ahci_set_phy_cfg()
311 	val = readl(mmio + PORTRANSCFG);  in xgene_ahci_set_phy_cfg()
313 	writel(val, mmio + PORTRANSCFG);  in xgene_ahci_set_phy_cfg()
598 	writel(0xffffffff, hpriv->mmio + HOST_IRQ_STAT);  in xgene_ahci_hw_init()
599 	readl(hpriv->mmio + HOST_IRQ_STAT); /* Force a barrier */  in xgene_ahci_hw_init()
750 		hpriv->mmio);  in xgene_ahci_probe()