Lines Matching refs:PLL_DIV4
27 #define PLL_DIV4 3 macro
211 { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
215 { CLKSEL_VALID, CGA_PLL2, PLL_DIV4 },
219 { CLKSEL_VALID, CGA_PLL3, PLL_DIV4 },
227 { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
231 { CLKSEL_VALID, CGA_PLL2, PLL_DIV4 },
239 { CLKSEL_VALID, CGB_PLL1, PLL_DIV4 },
243 { CLKSEL_VALID, CGB_PLL2, PLL_DIV4 },
290 { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
303 { CLKSEL_VALID, CGA_PLL2, PLL_DIV4 },
316 { CLKSEL_VALID, CGA_PLL1, PLL_DIV4 },
327 [4] = { CLKSEL_VALID, CGB_PLL1, PLL_DIV4 },
337 [4] = { CLKSEL_VALID, CGB_PLL2, PLL_DIV4 },
384 div = PLL_DIV4; in p5020_init_periph()
399 div = PLL_DIV4; in p5040_init_periph()