38 	struct clk *clk;  member
90 	struct clk *sysclk;
92 	struct clk *cmux[NUM_CMUX];
93 	struct clk *hwaccel[NUM_HWACCEL];
94 	struct clk *fman[2];
355 		cg->fman[0] = cg->pll[CGA_PLL2].div[PLL_DIV2].clk;  in p2041_init_periph()
357 		cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;  in p2041_init_periph()
367 		cg->fman[0] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk;  in p4080_init_periph()
369 		cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;  in p4080_init_periph()
372 		cg->fman[1] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk;  in p4080_init_periph()
374 		cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;  in p4080_init_periph()
387 		cg->fman[0] = cg->pll[CGA_PLL2].div[div].clk;  in p5020_init_periph()
389 		cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;  in p5020_init_periph()
402 		cg->fman[0] = cg->pll[CGA_PLL3].div[div].clk;  in p5040_init_periph()
404 		cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;  in p5040_init_periph()
407 		cg->fman[1] = cg->pll[CGA_PLL3].div[div].clk;  in p5040_init_periph()
409 		cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk;  in p5040_init_periph()
419 	cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk;  in t1040_init_periph()
699 static struct clk * __init create_mux_common(struct clockgen *cg,  in create_mux_common()
707 	struct clk *clk;  in create_mux_common()  local
724 		rate = clk_get_rate(div->clk);  in create_mux_common()
746 	clk = clk_register(NULL, &hwc->hw);  in create_mux_common()
747 	if (IS_ERR(clk)) {  in create_mux_common()
749 		       PTR_ERR(clk));  in create_mux_common()
754 	return clk;  in create_mux_common()
757 static struct clk * __init create_one_cmux(struct clockgen *cg, int idx)  in create_one_cmux()
786 	pct80_rate = clk_get_rate(div->clk);  in create_one_cmux()
790 	plat_rate = clk_get_rate(cg->pll[PLATFORM_PLL].div[PLL_DIV1].clk);  in create_one_cmux()
801 static struct clk * __init create_one_hwaccel(struct clockgen *cg, int idx)  in create_one_hwaccel()
852 	struct clk *clk;  in core_mux_init()  local
862 	clk = clockgen.cmux[idx];  in core_mux_init()
864 	rc = of_clk_add_provider(np, of_clk_src_simple_get, clk);  in core_mux_init()
872 static struct clk *sysclk_from_fixed(struct device_node *node, const char *name)  in sysclk_from_fixed()
882 static struct clk *sysclk_from_parent(const char *name)  in sysclk_from_parent()
884 	struct clk *clk;  in sysclk_from_parent()  local
887 	clk = of_clk_get(clockgen.node, 0);  in sysclk_from_parent()
888 	if (IS_ERR(clk))  in sysclk_from_parent()
889 		return clk;  in sysclk_from_parent()
892 	parent_name = __clk_get_name(clk);  in sysclk_from_parent()
893 	clk = clk_register_fixed_factor(NULL, name, parent_name,  in sysclk_from_parent()
895 	if (IS_ERR(clk))  in sysclk_from_parent()
897 		       PTR_ERR(clk));  in sysclk_from_parent()
899 	return clk;  in sysclk_from_parent()
902 static struct clk * __init create_sysclk(const char *name)  in create_sysclk()
905 	struct clk *clk;  in create_sysclk()  local
907 	clk = sysclk_from_fixed(clockgen.node, name);  in create_sysclk()
908 	if (!IS_ERR(clk))  in create_sysclk()
909 		return clk;  in create_sysclk()
911 	clk = sysclk_from_parent(name);  in create_sysclk()
912 	if (!IS_ERR(clk))  in create_sysclk()
913 		return clk;  in create_sysclk()
917 		clk = sysclk_from_fixed(sysclk, name);  in create_sysclk()
918 		if (!IS_ERR(clk))  in create_sysclk()
919 			return clk;  in create_sysclk()
929 	struct clk *clk;  in sysclk_init()  local
933 	clk = clockgen.sysclk;  in sysclk_init()
934 	if (clk)  in sysclk_init()
935 		of_clk_add_provider(node, of_clk_src_simple_get, clk);  in sysclk_init()
994 		struct clk *clk;  in create_one_pll()  local
999 		clk = clk_register_fixed_factor(NULL,  in create_one_pll()
1001 		if (IS_ERR(clk)) {  in create_one_pll()
1003 			       __func__, pll->div[i].name, PTR_ERR(clk));  in create_one_pll()
1007 		pll->div[i].clk = clk;  in create_one_pll()
1023 	struct clk **subclks;  in legacy_pll_init()
1032 	subclks = kcalloc(4, sizeof(struct clk *), GFP_KERNEL);  in legacy_pll_init()
1041 		subclks[0] = pll->div[0].clk;  in legacy_pll_init()
1042 		subclks[1] = pll->div[1].clk;  in legacy_pll_init()
1043 		subclks[2] = pll->div[3].clk;  in legacy_pll_init()
1045 		subclks[0] = pll->div[0].clk;  in legacy_pll_init()
1046 		subclks[1] = pll->div[1].clk;  in legacy_pll_init()
1047 		subclks[2] = pll->div[2].clk;  in legacy_pll_init()
1048 		subclks[3] = pll->div[3].clk;  in legacy_pll_init()
1095 static struct clk *clockgen_clk_get(struct of_phandle_args *clkspec, void *data)  in clockgen_clk_get()
1098 	struct clk *clk;  in clockgen_clk_get()  local
1114 		clk = cg->sysclk;  in clockgen_clk_get()
1119 		clk = cg->cmux[idx];  in clockgen_clk_get()
1124 		clk = cg->hwaccel[idx];  in clockgen_clk_get()
1129 		clk = cg->fman[idx];  in clockgen_clk_get()
1135 		clk = pll->div[idx].clk;  in clockgen_clk_get()
1141 	if (!clk)  in clockgen_clk_get()
1143 	return clk;  in clockgen_clk_get()