51 	struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw);  in hi6220_clkdiv_recalc_rate()  local
53 	val = readl_relaxed(dclk->reg) >> dclk->shift;  in hi6220_clkdiv_recalc_rate()
54 	val &= div_mask(dclk->width);  in hi6220_clkdiv_recalc_rate()
56 	return divider_recalc_rate(hw, parent_rate, val, dclk->table,  in hi6220_clkdiv_recalc_rate()
63 	struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw);  in hi6220_clkdiv_round_rate()  local
65 	return divider_round_rate(hw, rate, prate, dclk->table,  in hi6220_clkdiv_round_rate()
66 				  dclk->width, CLK_DIVIDER_ROUND_CLOSEST);  in hi6220_clkdiv_round_rate()
75 	struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw);  in hi6220_clkdiv_set_rate()  local
77 	value = divider_get_val(rate, parent_rate, dclk->table,  in hi6220_clkdiv_set_rate()
78 				dclk->width, CLK_DIVIDER_ROUND_CLOSEST);  in hi6220_clkdiv_set_rate()
80 	if (dclk->lock)  in hi6220_clkdiv_set_rate()
81 		spin_lock_irqsave(dclk->lock, flags);  in hi6220_clkdiv_set_rate()
83 	data = readl_relaxed(dclk->reg);  in hi6220_clkdiv_set_rate()
84 	data &= ~(div_mask(dclk->width) << dclk->shift);  in hi6220_clkdiv_set_rate()
85 	data |= value << dclk->shift;  in hi6220_clkdiv_set_rate()
86 	data |= dclk->mask;  in hi6220_clkdiv_set_rate()
88 	writel_relaxed(data, dclk->reg);  in hi6220_clkdiv_set_rate()
90 	if (dclk->lock)  in hi6220_clkdiv_set_rate()
91 		spin_unlock_irqrestore(dclk->lock, flags);  in hi6220_clkdiv_set_rate()