Lines Matching refs:corediv
78 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_is_enabled() local
79 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_is_enabled()
80 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_is_enabled()
83 return !!(readl(corediv->reg) & enable_mask); in clk_corediv_is_enabled()
88 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_enable() local
89 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_enable()
90 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_enable()
94 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_enable()
96 reg = readl(corediv->reg); in clk_corediv_enable()
98 writel(reg, corediv->reg); in clk_corediv_enable()
100 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_enable()
107 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_disable() local
108 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_disable()
109 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_disable()
113 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_disable()
115 reg = readl(corediv->reg); in clk_corediv_disable()
117 writel(reg, corediv->reg); in clk_corediv_disable()
119 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_disable()
125 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_recalc_rate() local
126 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_recalc_rate()
127 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_recalc_rate()
130 reg = readl(corediv->reg + soc_desc->ratio_offset); in clk_corediv_recalc_rate()
153 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_set_rate() local
154 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_set_rate()
155 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_set_rate()
161 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_set_rate()
164 reg = readl(corediv->reg + soc_desc->ratio_offset); in clk_corediv_set_rate()
167 writel(reg, corediv->reg + soc_desc->ratio_offset); in clk_corediv_set_rate()
170 reg = readl(corediv->reg) | BIT(desc->fieldbit); in clk_corediv_set_rate()
171 writel(reg, corediv->reg); in clk_corediv_set_rate()
174 reg = readl(corediv->reg) | soc_desc->ratio_reload; in clk_corediv_set_rate()
175 writel(reg, corediv->reg); in clk_corediv_set_rate()
183 writel(reg, corediv->reg); in clk_corediv_set_rate()
186 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_set_rate()
240 struct clk_corediv *corediv; in mvebu_corediv_clk_init() local
261 corediv = kcalloc(clk_data.clk_num, sizeof(struct clk_corediv), in mvebu_corediv_clk_init()
263 if (WARN_ON(!corediv)) in mvebu_corediv_clk_init()
266 spin_lock_init(&corediv->lock); in mvebu_corediv_clk_init()
277 corediv[i].soc_desc = soc_desc; in mvebu_corediv_clk_init()
278 corediv[i].desc = soc_desc->descs + i; in mvebu_corediv_clk_init()
279 corediv[i].reg = base; in mvebu_corediv_clk_init()
280 corediv[i].hw.init = &init; in mvebu_corediv_clk_init()
282 clks[i] = clk_register(NULL, &corediv[i].hw); in mvebu_corediv_clk_init()