Lines Matching refs:RK2928_CLKSEL_CON
118 .reg = RK2928_CLKSEL_CON(0), \
124 .reg = RK2928_CLKSEL_CON(1), \
155 .core_reg = RK2928_CLKSEL_CON(0),
166 .reg = RK2928_CLKSEL_CON(1), \
191 .core_reg = RK2928_CLKSEL_CON(0),
259 RK2928_CLKSEL_CON(0), 6, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
263 RK2928_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 5, DFLAGS,
268 RK2928_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS,
276 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
290 RK2928_CLKSEL_CON(31), 7, 1, MFLAGS, 0, 5, DFLAGS,
293 RK2928_CLKSEL_CON(31), 15, 1, MFLAGS, 8, 5, DFLAGS,
299 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
302 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
306 RK2928_CLKSEL_CON(29), 0, 1, MFLAGS),
308 RK2928_CLKSEL_CON(29), 1, 5, DFLAGS,
311 RK2928_CLKSEL_CON(29), 7, 1, MFLAGS),
316 RK2928_CLKSEL_CON(30), 8, IFLAGS),
328 RK2928_CLKSEL_CON(21), 0, 1, MFLAGS, 8, 5, DFLAGS,
331 RK2928_CLKSEL_CON(21), 4, 1, MFLAGS),
336 RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
339 RK2928_CLKSEL_CON(23), 0,
342 RK2928_CLKSEL_CON(22), 4, 2, MFLAGS),
344 RK2928_CLKSEL_CON(22), 7, IFLAGS),
347 RK2928_CLKSEL_CON(24), 8, 8, DFLAGS,
351 RK2928_CLKSEL_CON(5), 0, 7, DFLAGS,
354 RK2928_CLKSEL_CON(9), 0,
357 RK2928_CLKSEL_CON(5), 8, 2, MFLAGS),
367 RK2928_CLKSEL_CON(25), 0, 7, DFLAGS,
370 RK2928_CLKSEL_CON(25), 8, 7, DFLAGS,
374 RK2928_CLKSEL_CON(11), 0, 6, DFLAGS,
377 RK2928_CLKSEL_CON(12), 0, 6, DFLAGS,
380 RK2928_CLKSEL_CON(12), 8, 6, DFLAGS,
384 RK2928_CLKSEL_CON(12), 15, 1, MFLAGS),
386 RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
389 RK2928_CLKSEL_CON(17), 0,
392 RK2928_CLKSEL_CON(13), 8, 2, MFLAGS),
394 RK2928_CLKSEL_CON(14), 0, 7, DFLAGS,
397 RK2928_CLKSEL_CON(18), 0,
400 RK2928_CLKSEL_CON(14), 8, 2, MFLAGS),
402 RK2928_CLKSEL_CON(15), 0, 7, DFLAGS,
405 RK2928_CLKSEL_CON(19), 0,
408 RK2928_CLKSEL_CON(15), 8, 2, MFLAGS),
410 RK2928_CLKSEL_CON(16), 0, 7, DFLAGS,
413 RK2928_CLKSEL_CON(20), 0,
416 RK2928_CLKSEL_CON(16), 8, 2, MFLAGS),
528 RK2928_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY, div_aclk_cpu_t),
530 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
533 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
536 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
544 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
548 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
551 RK2928_CLKSEL_CON(27), 4, 1, MFLAGS),
553 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
556 RK2928_CLKSEL_CON(28), 4, 1, MFLAGS),
559 RK2928_CLKSEL_CON(29), 8, 5, DFLAGS,
562 RK2928_CLKSEL_CON(29), 15, 1, MFLAGS),
567 RK2928_CLKSEL_CON(30), 12, IFLAGS),
570 RK2928_CLKSEL_CON(33), 8, 1, MFLAGS, 0, 5, DFLAGS,
579 RK2928_CLKSEL_CON(34), 0, 16, DFLAGS,
583 RK2928_CLKSEL_CON(2), 15, 1, MFLAGS),
585 RK2928_CLKSEL_CON(2), 0, 7, DFLAGS,
588 RK2928_CLKSEL_CON(6), 0,
591 RK2928_CLKSEL_CON(2), 8, 2, MFLAGS),
593 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,
596 RK2928_CLKSEL_CON(7), 0,
599 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS),
601 RK2928_CLKSEL_CON(4), 0, 7, DFLAGS,
604 RK2928_CLKSEL_CON(8), 0,
607 RK2928_CLKSEL_CON(4), 8, 2, MFLAGS),
643 RK2928_CLKSEL_CON(1), 3, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
648 RK2928_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS),
650 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
652 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
654 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
661 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
665 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
668 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
672 RK2928_CLKSEL_CON(34), 7, 1, MFLAGS, 0, 5, DFLAGS,
684 RK2928_CLKSEL_CON(30), 0, 2, DFLAGS,
687 RK2928_CLKSEL_CON(11), 8, 6, DFLAGS),
690 RK2928_CLKSEL_CON(2), 15, 1, MFLAGS),
692 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,
695 RK2928_CLKSEL_CON(7), 0,
698 RK2928_CLKSEL_CON(3), 8, 2, MFLAGS),