Lines Matching refs:ENABLE_PCLK_PERIC0
1559 #define ENABLE_PCLK_PERIC0 0x0900 macro
1570 ENABLE_PCLK_PERIC0,
1596 GATE(CLK_PCLK_SCI, "pclk_sci", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1599 ENABLE_PCLK_PERIC0, 30, CLK_IGNORE_UNUSED, 0),
1601 ENABLE_PCLK_PERIC0, 29, CLK_IGNORE_UNUSED, 0),
1602 GATE(CLK_PCLK_PWM, "pclk_pwm", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1604 GATE(CLK_PCLK_SPDIF, "pclk_spdif", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1606 GATE(CLK_PCLK_PCM1, "pclk_pcm1", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1608 GATE(CLK_PCLK_I2S1, "pclk_i2s", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1610 GATE(CLK_PCLK_SPI2, "pclk_spi2", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1612 GATE(CLK_PCLK_SPI1, "pclk_spi1", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1614 GATE(CLK_PCLK_SPI0, "pclk_spi0", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1616 GATE(CLK_PCLK_ADCIF, "pclk_adcif", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1619 ENABLE_PCLK_PERIC0, 19, CLK_IGNORE_UNUSED, 0),
1621 ENABLE_PCLK_PERIC0, 18, CLK_IGNORE_UNUSED, 0),
1623 ENABLE_PCLK_PERIC0, 17, CLK_IGNORE_UNUSED, 0),
1625 ENABLE_PCLK_PERIC0, 16, CLK_SET_RATE_PARENT, 0),
1627 ENABLE_PCLK_PERIC0, 15,
1629 GATE(CLK_PCLK_UART2, "pclk_uart2", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1631 GATE(CLK_PCLK_UART1, "pclk_uart1", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1633 GATE(CLK_PCLK_UART0, "pclk_uart0", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1636 ENABLE_PCLK_PERIC0, 11, CLK_SET_RATE_PARENT, 0),
1638 ENABLE_PCLK_PERIC0, 10, CLK_SET_RATE_PARENT, 0),
1640 ENABLE_PCLK_PERIC0, 9, CLK_SET_RATE_PARENT, 0),
1642 ENABLE_PCLK_PERIC0, 8, CLK_SET_RATE_PARENT, 0),
1643 GATE(CLK_PCLK_I2C7, "pclk_i2c7", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1645 GATE(CLK_PCLK_I2C6, "pclk_i2c6", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1647 GATE(CLK_PCLK_I2C5, "pclk_i2c5", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1649 GATE(CLK_PCLK_I2C4, "pclk_i2c4", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1651 GATE(CLK_PCLK_I2C3, "pclk_i2c3", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1653 GATE(CLK_PCLK_I2C2, "pclk_i2c2", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1655 GATE(CLK_PCLK_I2C1, "pclk_i2c1", "aclk_peric_66", ENABLE_PCLK_PERIC0,
1657 GATE(CLK_PCLK_I2C0, "pclk_i2c0", "aclk_peric_66", ENABLE_PCLK_PERIC0,