342 static inline void clkc_writel(u32 val, unsigned reg)  in clkc_writel()  function
505 	clkc_writel(val, reg);  in dto_clk_enable()
517 	clkc_writel(val, reg);  in dto_clk_disable()
557 	clkc_writel(0, clk->src_offset + SIRFSOC_CLKC_AUDIO_DTO_DROFF - SIRFSOC_CLKC_AUDIO_DTO_SRC);  in dto_clk_set_rate()
558 	clkc_writel(dividend, clk->inc_offset);  in dto_clk_set_rate()
577 	clkc_writel(index, clk->src_offset);  in dto_clk_set_parent()
1223 	clkc_writel(BIT(clk->bit), reg);  in unit_clk_enable()
1225 		clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_IDLEREQ_CLR);  in unit_clk_enable()
1227 		clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_SLVRDY_SET);  in unit_clk_enable()
1243 		clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_IDLEREQ_SET);  in unit_clk_disable()
1253 			clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_IDLEREQ_CLR);  in unit_clk_disable()
1258 		clkc_writel(BIT(clk->idle_bit), SIRFSOC_NOC_CLK_SLVRDY_CLR);  in unit_clk_disable()
1260 	clkc_writel(BIT(clk->bit), reg);  in unit_clk_disable()
1408 		clkc_writel(1 << reset->rst_bit, reset->rst_ofs + 4);  in atlas7_reset_module()
1410 		clkc_writel(1 << reset->clk_bit, reset->clk_ofs + 4);  in atlas7_reset_module()
1411 		clkc_writel(1 << reset->rst_bit, reset->rst_ofs);  in atlas7_reset_module()
1413 		clkc_writel(1 << reset->clk_bit, reset->clk_ofs);  in atlas7_reset_module()
1415 		clkc_writel(1 << reset->rst_bit, reset->rst_ofs + 4);  in atlas7_reset_module()
1416 		clkc_writel(1 << reset->clk_bit, reset->clk_ofs);  in atlas7_reset_module()
1418 		clkc_writel(1 << reset->clk_bit, reset->clk_ofs + 4);  in atlas7_reset_module()
1419 		clkc_writel(1 << reset->rst_bit, reset->rst_ofs);  in atlas7_reset_module()