Lines Matching refs:clk
166 static struct clk **clks;
637 struct clk *clk; in tegra20_pll_init() local
640 clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0, in tegra20_pll_init()
642 clks[TEGRA20_CLK_PLL_C] = clk; in tegra20_pll_init()
645 clk = tegra_clk_register_divider("pll_c_out1_div", "pll_c", in tegra20_pll_init()
648 clk = tegra_clk_register_pll_out("pll_c_out1", "pll_c_out1_div", in tegra20_pll_init()
651 clks[TEGRA20_CLK_PLL_C_OUT1] = clk; in tegra20_pll_init()
654 clk = tegra_clk_register_pll("pll_m", "pll_ref", clk_base, NULL, in tegra20_pll_init()
657 clks[TEGRA20_CLK_PLL_M] = clk; in tegra20_pll_init()
660 clk = tegra_clk_register_divider("pll_m_out1_div", "pll_m", in tegra20_pll_init()
663 clk = tegra_clk_register_pll_out("pll_m_out1", "pll_m_out1_div", in tegra20_pll_init()
666 clks[TEGRA20_CLK_PLL_M_OUT1] = clk; in tegra20_pll_init()
669 clk = tegra_clk_register_pll("pll_x", "pll_ref", clk_base, NULL, 0, in tegra20_pll_init()
671 clks[TEGRA20_CLK_PLL_X] = clk; in tegra20_pll_init()
674 clk = tegra_clk_register_pll("pll_u", "pll_ref", clk_base, NULL, 0, in tegra20_pll_init()
676 clks[TEGRA20_CLK_PLL_U] = clk; in tegra20_pll_init()
679 clk = tegra_clk_register_pll("pll_d", "pll_ref", clk_base, NULL, 0, in tegra20_pll_init()
681 clks[TEGRA20_CLK_PLL_D] = clk; in tegra20_pll_init()
684 clk = clk_register_fixed_factor(NULL, "pll_d_out0", "pll_d", in tegra20_pll_init()
686 clks[TEGRA20_CLK_PLL_D_OUT0] = clk; in tegra20_pll_init()
689 clk = tegra_clk_register_pll("pll_a", "pll_p_out1", clk_base, NULL, 0, in tegra20_pll_init()
691 clks[TEGRA20_CLK_PLL_A] = clk; in tegra20_pll_init()
694 clk = tegra_clk_register_divider("pll_a_out0_div", "pll_a", in tegra20_pll_init()
697 clk = tegra_clk_register_pll_out("pll_a_out0", "pll_a_out0_div", in tegra20_pll_init()
700 clks[TEGRA20_CLK_PLL_A_OUT0] = clk; in tegra20_pll_init()
703 clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, pmc_base, in tegra20_pll_init()
705 clks[TEGRA20_CLK_PLL_E] = clk; in tegra20_pll_init()
717 struct clk *clk; in tegra20_super_clk_init() local
720 clk = tegra_clk_register_super_mux("cclk", cclk_parents, in tegra20_super_clk_init()
723 clks[TEGRA20_CLK_CCLK] = clk; in tegra20_super_clk_init()
726 clk = tegra_clk_register_super_mux("sclk", sclk_parents, in tegra20_super_clk_init()
729 clks[TEGRA20_CLK_SCLK] = clk; in tegra20_super_clk_init()
732 clk = clk_register_fixed_factor(NULL, "twd", "cclk", 0, 1, 4); in tegra20_super_clk_init()
733 clks[TEGRA20_CLK_TWD] = clk; in tegra20_super_clk_init()
742 struct clk *clk; in tegra20_audio_clk_init() local
745 clk = clk_register_mux(NULL, "audio_mux", audio_parents, in tegra20_audio_clk_init()
749 clk = clk_register_gate(NULL, "audio", "audio_mux", 0, in tegra20_audio_clk_init()
752 clks[TEGRA20_CLK_AUDIO] = clk; in tegra20_audio_clk_init()
755 clk = clk_register_fixed_factor(NULL, "audio_doubler", "audio", in tegra20_audio_clk_init()
757 clk = tegra_clk_register_periph_gate("audio_2x", "audio_doubler", in tegra20_audio_clk_init()
761 clks[TEGRA20_CLK_AUDIO_2X] = clk; in tegra20_audio_clk_init()
804 struct clk *clk; in tegra20_periph_clk_init() local
808 clk = tegra_clk_register_periph_gate("ac97", "pll_a_out0", in tegra20_periph_clk_init()
811 clks[TEGRA20_CLK_AC97] = clk; in tegra20_periph_clk_init()
814 clk = tegra_clk_register_periph_gate("apbdma", "pclk", 0, clk_base, in tegra20_periph_clk_init()
816 clks[TEGRA20_CLK_APBDMA] = clk; in tegra20_periph_clk_init()
819 clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm, in tegra20_periph_clk_init()
824 clk = tegra_clk_register_periph_gate("emc", "emc_mux", 0, clk_base, 0, in tegra20_periph_clk_init()
826 clks[TEGRA20_CLK_EMC] = clk; in tegra20_periph_clk_init()
828 clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, in tegra20_periph_clk_init()
830 clks[TEGRA20_CLK_MC] = clk; in tegra20_periph_clk_init()
833 clk = tegra_clk_register_periph_gate("dsi", "pll_d", 0, clk_base, 0, in tegra20_periph_clk_init()
835 clk_register_clkdev(clk, NULL, "dsi"); in tegra20_periph_clk_init()
836 clks[TEGRA20_CLK_DSI] = clk; in tegra20_periph_clk_init()
839 clk = tegra_clk_register_periph_gate("pex", "clk_m", 0, clk_base, 0, 70, in tegra20_periph_clk_init()
841 clks[TEGRA20_CLK_PEX] = clk; in tegra20_periph_clk_init()
844 clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, CLK_IS_ROOT, in tegra20_periph_clk_init()
846 clk = tegra_clk_register_periph_gate("cdev1", "cdev1_fixed", 0, in tegra20_periph_clk_init()
848 clks[TEGRA20_CLK_CDEV1] = clk; in tegra20_periph_clk_init()
851 clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, CLK_IS_ROOT, in tegra20_periph_clk_init()
853 clk = tegra_clk_register_periph_gate("cdev2", "cdev2_fixed", 0, in tegra20_periph_clk_init()
855 clks[TEGRA20_CLK_CDEV2] = clk; in tegra20_periph_clk_init()
859 clk = tegra_clk_register_periph(data->name, data->p.parent_names, in tegra20_periph_clk_init()
862 clks[data->clk_id] = clk; in tegra20_periph_clk_init()
867 clk = tegra_clk_register_periph_nodiv(data->name, in tegra20_periph_clk_init()
871 clks[data->clk_id] = clk; in tegra20_periph_clk_init()
879 struct clk *clk; in tegra20_osc_clk_init() local
886 clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT | in tegra20_osc_clk_init()
888 clks[TEGRA20_CLK_CLK_M] = clk; in tegra20_osc_clk_init()
892 clk = clk_register_fixed_factor(NULL, "pll_ref", "clk_m", in tegra20_osc_clk_init()
894 clks[TEGRA20_CLK_PLL_REF] = clk; in tegra20_osc_clk_init()