43 static u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk);
44 static void omap3_dpll_deny_idle(struct clk_hw_omap *clk);
45 static void omap3_dpll_allow_idle(struct clk_hw_omap *clk);
50 static void _omap3_dpll_write_clken(struct clk_hw_omap *clk, u8 clken_bits)  in _omap3_dpll_write_clken()  argument
55 	dd = clk->dpll_data;  in _omap3_dpll_write_clken()
64 static int _omap3_wait_dpll_status(struct clk_hw_omap *clk, u8 state)  in _omap3_wait_dpll_status()  argument
71 	dd = clk->dpll_data;  in _omap3_wait_dpll_status()
72 	clk_name = clk_hw_get_name(&clk->hw);  in _omap3_wait_dpll_status()
96 static u16 _omap3_dpll_compute_freqsel(struct clk_hw_omap *clk, u8 n)  in _omap3_dpll_compute_freqsel()  argument
101 	fint = clk_get_rate(clk->dpll_data->clk_ref) / n;  in _omap3_dpll_compute_freqsel()
141 static int _omap3_noncore_dpll_lock(struct clk_hw_omap *clk)  in _omap3_noncore_dpll_lock()  argument
148 	pr_debug("clock: locking DPLL %s\n", clk_hw_get_name(&clk->hw));  in _omap3_noncore_dpll_lock()
150 	dd = clk->dpll_data;  in _omap3_noncore_dpll_lock()
158 	ai = omap3_dpll_autoidle_read(clk);  in _omap3_noncore_dpll_lock()
161 		omap3_dpll_deny_idle(clk);  in _omap3_noncore_dpll_lock()
163 	_omap3_dpll_write_clken(clk, DPLL_LOCKED);  in _omap3_noncore_dpll_lock()
165 	r = _omap3_wait_dpll_status(clk, 1);  in _omap3_noncore_dpll_lock()
168 		omap3_dpll_allow_idle(clk);  in _omap3_noncore_dpll_lock()
187 static int _omap3_noncore_dpll_bypass(struct clk_hw_omap *clk)  in _omap3_noncore_dpll_bypass()  argument
192 	if (!(clk->dpll_data->modes & (1 << DPLL_LOW_POWER_BYPASS)))  in _omap3_noncore_dpll_bypass()
196 		 clk_hw_get_name(&clk->hw));  in _omap3_noncore_dpll_bypass()
198 	ai = omap3_dpll_autoidle_read(clk);  in _omap3_noncore_dpll_bypass()
200 	_omap3_dpll_write_clken(clk, DPLL_LOW_POWER_BYPASS);  in _omap3_noncore_dpll_bypass()
202 	r = _omap3_wait_dpll_status(clk, 0);  in _omap3_noncore_dpll_bypass()
205 		omap3_dpll_allow_idle(clk);  in _omap3_noncore_dpll_bypass()
219 static int _omap3_noncore_dpll_stop(struct clk_hw_omap *clk)  in _omap3_noncore_dpll_stop()  argument
223 	if (!(clk->dpll_data->modes & (1 << DPLL_LOW_POWER_STOP)))  in _omap3_noncore_dpll_stop()
226 	pr_debug("clock: stopping DPLL %s\n", clk_hw_get_name(&clk->hw));  in _omap3_noncore_dpll_stop()
228 	ai = omap3_dpll_autoidle_read(clk);  in _omap3_noncore_dpll_stop()
230 	_omap3_dpll_write_clken(clk, DPLL_LOW_POWER_STOP);  in _omap3_noncore_dpll_stop()
233 		omap3_dpll_allow_idle(clk);  in _omap3_noncore_dpll_stop()
250 static void _lookup_dco(struct clk_hw_omap *clk, u8 *dco, u16 m, u8 n)  in _lookup_dco()  argument
254 	clkinp = clk_hw_get_rate(clk_hw_get_parent(&clk->hw));  in _lookup_dco()
275 static void _lookup_sddiv(struct clk_hw_omap *clk, u8 *sd_div, u16 m, u8 n)  in _lookup_sddiv()  argument
280 	clkinp = clk_hw_get_rate(clk_hw_get_parent(&clk->hw));  in _lookup_sddiv()
305 static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)  in omap3_noncore_dpll_program()  argument
307 	struct dpll_data *dd = clk->dpll_data;  in omap3_noncore_dpll_program()
312 	_omap3_noncore_dpll_bypass(clk);  in omap3_noncore_dpll_program()
342 		_lookup_dco(clk, &dco, dd->last_rounded_m, dd->last_rounded_n);  in omap3_noncore_dpll_program()
347 		_lookup_sddiv(clk, &sd_div, dd->last_rounded_m,  in omap3_noncore_dpll_program()
380 	_omap3_noncore_dpll_lock(clk);  in omap3_noncore_dpll_program()
395 	struct clk_hw_omap *clk = to_clk_hw_omap(hw);  in omap3_dpll_recalc()  local
397 	return omap2_get_dpll_rate(clk);  in omap3_dpll_recalc()
418 	struct clk_hw_omap *clk = to_clk_hw_omap(hw);  in omap3_noncore_dpll_enable()  local
423 	dd = clk->dpll_data;  in omap3_noncore_dpll_enable()
427 	if (clk->clkdm) {  in omap3_noncore_dpll_enable()
428 		r = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);  in omap3_noncore_dpll_enable()
433 			     clk->clkdm_name, r);  in omap3_noncore_dpll_enable()
442 		r = _omap3_noncore_dpll_bypass(clk);  in omap3_noncore_dpll_enable()
445 		r = _omap3_noncore_dpll_lock(clk);  in omap3_noncore_dpll_enable()
460 	struct clk_hw_omap *clk = to_clk_hw_omap(hw);  in omap3_noncore_dpll_disable()  local
462 	_omap3_noncore_dpll_stop(clk);  in omap3_noncore_dpll_disable()
463 	if (clk->clkdm)  in omap3_noncore_dpll_disable()
464 		ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);  in omap3_noncore_dpll_disable()
482 	struct clk_hw_omap *clk = to_clk_hw_omap(hw);  in omap3_noncore_dpll_determine_rate()  local
488 	dd = clk->dpll_data;  in omap3_noncore_dpll_determine_rate()
516 	struct clk_hw_omap *clk = to_clk_hw_omap(hw);  in omap3_noncore_dpll_set_parent()  local
523 		ret = _omap3_noncore_dpll_bypass(clk);  in omap3_noncore_dpll_set_parent()
525 		ret = _omap3_noncore_dpll_lock(clk);  in omap3_noncore_dpll_set_parent()
544 	struct clk_hw_omap *clk = to_clk_hw_omap(hw);  in omap3_noncore_dpll_set_rate()  local
552 	dd = clk->dpll_data;  in omap3_noncore_dpll_set_rate()
564 		freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n);  in omap3_noncore_dpll_set_rate()
571 	ret = omap3_noncore_dpll_program(clk, freqsel);  in omap3_noncore_dpll_set_rate()
622 static u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk)  in omap3_dpll_autoidle_read()  argument
627 	if (!clk || !clk->dpll_data)  in omap3_dpll_autoidle_read()
630 	dd = clk->dpll_data;  in omap3_dpll_autoidle_read()
651 static void omap3_dpll_allow_idle(struct clk_hw_omap *clk)  in omap3_dpll_allow_idle()  argument
656 	if (!clk || !clk->dpll_data)  in omap3_dpll_allow_idle()
659 	dd = clk->dpll_data;  in omap3_dpll_allow_idle()
681 static void omap3_dpll_deny_idle(struct clk_hw_omap *clk)  in omap3_dpll_deny_idle()  argument
686 	if (!clk || !clk->dpll_data)  in omap3_dpll_deny_idle()
689 	dd = clk->dpll_data;  in omap3_dpll_deny_idle()