Lines Matching refs:clk
21 static struct clk *topclk[ZX296702_TOPCLK_END];
22 static struct clk *lsp0clk[ZX296702_LSP0CLK_END];
23 static struct clk *lsp1clk[ZX296702_LSP1CLK_END];
199 static inline struct clk *zx_divtbl(const char *name, const char *parent, in zx_divtbl()
207 static inline struct clk *zx_div(const char *name, const char *parent, in zx_div()
214 static inline struct clk *zx_mux(const char *name, const char * const *parents, in zx_mux()
221 static inline struct clk *zx_gate(const char *name, const char *parent, in zx_gate()
230 struct clk **clk = topclk; in zx296702_top_clocks_init() local
236 clk[ZX296702_OSC] = in zx296702_top_clocks_init()
239 clk[ZX296702_PLL_A9] = in zx296702_top_clocks_init()
245 clk[ZX296702_PLL_A9_350M] = in zx296702_top_clocks_init()
248 clk[ZX296702_PLL_MAC_1000M] = in zx296702_top_clocks_init()
251 clk[ZX296702_PLL_MAC_333M] = in zx296702_top_clocks_init()
254 clk[ZX296702_PLL_MM0_1188M] = in zx296702_top_clocks_init()
257 clk[ZX296702_PLL_MM0_396M] = in zx296702_top_clocks_init()
260 clk[ZX296702_PLL_MM0_198M] = in zx296702_top_clocks_init()
263 clk[ZX296702_PLL_MM1_108M] = in zx296702_top_clocks_init()
266 clk[ZX296702_PLL_MM1_72M] = in zx296702_top_clocks_init()
269 clk[ZX296702_PLL_MM1_54M] = in zx296702_top_clocks_init()
272 clk[ZX296702_PLL_LSP_104M] = in zx296702_top_clocks_init()
275 clk[ZX296702_PLL_LSP_26M] = in zx296702_top_clocks_init()
278 clk[ZX296702_PLL_DDR_266M] = in zx296702_top_clocks_init()
281 clk[ZX296702_PLL_AUDIO_294M912] = in zx296702_top_clocks_init()
286 clk[ZX296702_MATRIX_ACLK] = in zx296702_top_clocks_init()
289 clk[ZX296702_MAIN_HCLK] = in zx296702_top_clocks_init()
292 clk[ZX296702_MAIN_PCLK] = in zx296702_top_clocks_init()
297 clk[ZX296702_CLK_500] = in zx296702_top_clocks_init()
300 clk[ZX296702_CLK_250] = in zx296702_top_clocks_init()
303 clk[ZX296702_CLK_125] = in zx296702_top_clocks_init()
305 clk[ZX296702_CLK_148M5] = in zx296702_top_clocks_init()
308 clk[ZX296702_CLK_74M25] = in zx296702_top_clocks_init()
311 clk[ZX296702_A9_WCLK] = in zx296702_top_clocks_init()
314 clk[ZX296702_A9_AS1_ACLK_MUX] = in zx296702_top_clocks_init()
317 clk[ZX296702_A9_TRACE_CLKIN_MUX] = in zx296702_top_clocks_init()
320 clk[ZX296702_A9_AS1_ACLK_DIV] = in zx296702_top_clocks_init()
325 clk[ZX296702_CLK_2] = in zx296702_top_clocks_init()
328 clk[ZX296702_CLK_27] = in zx296702_top_clocks_init()
331 clk[ZX296702_DECPPU_ACLK_MUX] = in zx296702_top_clocks_init()
334 clk[ZX296702_PPU_ACLK_MUX] = in zx296702_top_clocks_init()
337 clk[ZX296702_MALI400_ACLK_MUX] = in zx296702_top_clocks_init()
340 clk[ZX296702_VOU_ACLK_MUX] = in zx296702_top_clocks_init()
343 clk[ZX296702_VOU_MAIN_WCLK_MUX] = in zx296702_top_clocks_init()
346 clk[ZX296702_VOU_AUX_WCLK_MUX] = in zx296702_top_clocks_init()
349 clk[ZX296702_VOU_SCALER_WCLK_MUX] = in zx296702_top_clocks_init()
353 clk[ZX296702_R2D_ACLK_MUX] = in zx296702_top_clocks_init()
356 clk[ZX296702_R2D_WCLK_MUX] = in zx296702_top_clocks_init()
361 clk[ZX296702_CLK_50] = in zx296702_top_clocks_init()
364 clk[ZX296702_CLK_25] = in zx296702_top_clocks_init()
367 clk[ZX296702_CLK_12] = in zx296702_top_clocks_init()
370 clk[ZX296702_CLK_16M384] = in zx296702_top_clocks_init()
373 clk[ZX296702_CLK_32K768] = in zx296702_top_clocks_init()
376 clk[ZX296702_SEC_WCLK_DIV] = in zx296702_top_clocks_init()
379 clk[ZX296702_DDR_WCLK_MUX] = in zx296702_top_clocks_init()
382 clk[ZX296702_NAND_WCLK_MUX] = in zx296702_top_clocks_init()
385 clk[ZX296702_LSP_26_WCLK_MUX] = in zx296702_top_clocks_init()
390 clk[ZX296702_A9_AS0_ACLK] = in zx296702_top_clocks_init()
392 clk[ZX296702_A9_AS1_ACLK] = in zx296702_top_clocks_init()
394 clk[ZX296702_A9_TRACE_CLKIN] = in zx296702_top_clocks_init()
396 clk[ZX296702_DECPPU_AXI_M_ACLK] = in zx296702_top_clocks_init()
398 clk[ZX296702_DECPPU_AHB_S_HCLK] = in zx296702_top_clocks_init()
400 clk[ZX296702_PPU_AXI_M_ACLK] = in zx296702_top_clocks_init()
402 clk[ZX296702_PPU_AHB_S_HCLK] = in zx296702_top_clocks_init()
404 clk[ZX296702_VOU_AXI_M_ACLK] = in zx296702_top_clocks_init()
406 clk[ZX296702_VOU_APB_PCLK] = in zx296702_top_clocks_init()
408 clk[ZX296702_VOU_MAIN_CHANNEL_WCLK] = in zx296702_top_clocks_init()
411 clk[ZX296702_VOU_AUX_CHANNEL_WCLK] = in zx296702_top_clocks_init()
414 clk[ZX296702_VOU_HDMI_OSCLK_CEC] = in zx296702_top_clocks_init()
416 clk[ZX296702_VOU_SCALER_WCLK] = in zx296702_top_clocks_init()
418 clk[ZX296702_MALI400_AXI_M_ACLK] = in zx296702_top_clocks_init()
420 clk[ZX296702_MALI400_APB_PCLK] = in zx296702_top_clocks_init()
422 clk[ZX296702_R2D_WCLK] = in zx296702_top_clocks_init()
424 clk[ZX296702_R2D_AXI_M_ACLK] = in zx296702_top_clocks_init()
426 clk[ZX296702_R2D_AHB_HCLK] = in zx296702_top_clocks_init()
428 clk[ZX296702_DDR3_AXI_S0_ACLK] = in zx296702_top_clocks_init()
430 clk[ZX296702_DDR3_APB_PCLK] = in zx296702_top_clocks_init()
432 clk[ZX296702_DDR3_WCLK] = in zx296702_top_clocks_init()
434 clk[ZX296702_USB20_0_AHB_HCLK] = in zx296702_top_clocks_init()
436 clk[ZX296702_USB20_0_EXTREFCLK] = in zx296702_top_clocks_init()
438 clk[ZX296702_USB20_1_AHB_HCLK] = in zx296702_top_clocks_init()
440 clk[ZX296702_USB20_1_EXTREFCLK] = in zx296702_top_clocks_init()
442 clk[ZX296702_USB20_2_AHB_HCLK] = in zx296702_top_clocks_init()
444 clk[ZX296702_USB20_2_EXTREFCLK] = in zx296702_top_clocks_init()
446 clk[ZX296702_GMAC_AXI_M_ACLK] = in zx296702_top_clocks_init()
448 clk[ZX296702_GMAC_APB_PCLK] = in zx296702_top_clocks_init()
450 clk[ZX296702_GMAC_125_CLKIN] = in zx296702_top_clocks_init()
452 clk[ZX296702_GMAC_RMII_CLKIN] = in zx296702_top_clocks_init()
454 clk[ZX296702_GMAC_25M_CLK] = in zx296702_top_clocks_init()
456 clk[ZX296702_NANDFLASH_AHB_HCLK] = in zx296702_top_clocks_init()
458 clk[ZX296702_NANDFLASH_WCLK] = in zx296702_top_clocks_init()
460 clk[ZX296702_LSP0_APB_PCLK] = in zx296702_top_clocks_init()
462 clk[ZX296702_LSP0_AHB_HCLK] = in zx296702_top_clocks_init()
464 clk[ZX296702_LSP0_26M_WCLK] = in zx296702_top_clocks_init()
466 clk[ZX296702_LSP0_104M_WCLK] = in zx296702_top_clocks_init()
468 clk[ZX296702_LSP0_16M384_WCLK] = in zx296702_top_clocks_init()
470 clk[ZX296702_LSP1_APB_PCLK] = in zx296702_top_clocks_init()
474 clk[ZX296702_LSP1_26M_WCLK] = in zx296702_top_clocks_init()
476 clk[ZX296702_LSP1_104M_WCLK] = in zx296702_top_clocks_init()
478 clk[ZX296702_LSP1_32K_CLK] = in zx296702_top_clocks_init()
480 clk[ZX296702_AON_HCLK] = in zx296702_top_clocks_init()
482 clk[ZX296702_SYS_CTRL_PCLK] = in zx296702_top_clocks_init()
484 clk[ZX296702_DMA_PCLK] = in zx296702_top_clocks_init()
486 clk[ZX296702_DMA_ACLK] = in zx296702_top_clocks_init()
488 clk[ZX296702_SEC_HCLK] = in zx296702_top_clocks_init()
490 clk[ZX296702_AES_WCLK] = in zx296702_top_clocks_init()
492 clk[ZX296702_DES_WCLK] = in zx296702_top_clocks_init()
494 clk[ZX296702_IRAM_ACLK] = in zx296702_top_clocks_init()
496 clk[ZX296702_IROM_ACLK] = in zx296702_top_clocks_init()
498 clk[ZX296702_BOOT_CTRL_HCLK] = in zx296702_top_clocks_init()
500 clk[ZX296702_EFUSE_CLK_30] = in zx296702_top_clocks_init()
504 clk[ZX296702_VOU_MAIN_CHANNEL_DIV] = in zx296702_top_clocks_init()
507 clk[ZX296702_VOU_AUX_CHANNEL_DIV] = in zx296702_top_clocks_init()
510 clk[ZX296702_VOU_TV_ENC_HD_DIV] = in zx296702_top_clocks_init()
513 clk[ZX296702_VOU_TV_ENC_SD_DIV] = in zx296702_top_clocks_init()
516 clk[ZX296702_VL0_MUX] = in zx296702_top_clocks_init()
519 clk[ZX296702_VL1_MUX] = in zx296702_top_clocks_init()
522 clk[ZX296702_VL2_MUX] = in zx296702_top_clocks_init()
525 clk[ZX296702_GL0_MUX] = in zx296702_top_clocks_init()
528 clk[ZX296702_GL1_MUX] = in zx296702_top_clocks_init()
531 clk[ZX296702_GL2_MUX] = in zx296702_top_clocks_init()
534 clk[ZX296702_WB_MUX] = in zx296702_top_clocks_init()
537 clk[ZX296702_HDMI_MUX] = in zx296702_top_clocks_init()
540 clk[ZX296702_VOU_TV_ENC_HD_MUX] = in zx296702_top_clocks_init()
543 clk[ZX296702_VOU_TV_ENC_SD_MUX] = in zx296702_top_clocks_init()
546 clk[ZX296702_VL0_CLK] = in zx296702_top_clocks_init()
548 clk[ZX296702_VL1_CLK] = in zx296702_top_clocks_init()
550 clk[ZX296702_VL2_CLK] = in zx296702_top_clocks_init()
552 clk[ZX296702_GL0_CLK] = in zx296702_top_clocks_init()
554 clk[ZX296702_GL1_CLK] = in zx296702_top_clocks_init()
556 clk[ZX296702_GL2_CLK] = in zx296702_top_clocks_init()
558 clk[ZX296702_WB_CLK] = in zx296702_top_clocks_init()
560 clk[ZX296702_CL_CLK] = in zx296702_top_clocks_init()
562 clk[ZX296702_MAIN_MIX_CLK] = in zx296702_top_clocks_init()
565 clk[ZX296702_AUX_MIX_CLK] = in zx296702_top_clocks_init()
568 clk[ZX296702_HDMI_CLK] = in zx296702_top_clocks_init()
570 clk[ZX296702_VOU_TV_ENC_HD_DAC_CLK] = in zx296702_top_clocks_init()
573 clk[ZX296702_VOU_TV_ENC_SD_DAC_CLK] = in zx296702_top_clocks_init()
578 clk[ZX296702_A9_PERIPHCLK] = in zx296702_top_clocks_init()
583 if (IS_ERR(clk[i])) { in zx296702_top_clocks_init()
585 i, PTR_ERR(clk[i])); in zx296702_top_clocks_init()
599 struct clk **clk = lsp0clk; in zx296702_lsp0_clocks_init() local
606 clk[ZX296702_SDMMC1_WCLK_MUX] = in zx296702_lsp0_clocks_init()
609 clk[ZX296702_SDMMC1_WCLK_DIV] = in zx296702_lsp0_clocks_init()
611 clk[ZX296702_SDMMC1_WCLK] = in zx296702_lsp0_clocks_init()
613 clk[ZX296702_SDMMC1_PCLK] = in zx296702_lsp0_clocks_init()
616 clk[ZX296702_GPIO_CLK] = in zx296702_lsp0_clocks_init()
620 clk[ZX296702_SPDIF0_WCLK_MUX] = in zx296702_lsp0_clocks_init()
623 clk[ZX296702_SPDIF0_WCLK] = in zx296702_lsp0_clocks_init()
625 clk[ZX296702_SPDIF0_PCLK] = in zx296702_lsp0_clocks_init()
628 clk[ZX296702_SPDIF0_DIV] = in zx296702_lsp0_clocks_init()
633 clk[ZX296702_I2S0_WCLK_MUX] = in zx296702_lsp0_clocks_init()
636 clk[ZX296702_I2S0_WCLK] = in zx296702_lsp0_clocks_init()
638 clk[ZX296702_I2S0_PCLK] = in zx296702_lsp0_clocks_init()
641 clk[ZX296702_I2S0_DIV] = in zx296702_lsp0_clocks_init()
644 clk[ZX296702_I2S1_WCLK_MUX] = in zx296702_lsp0_clocks_init()
647 clk[ZX296702_I2S1_WCLK] = in zx296702_lsp0_clocks_init()
649 clk[ZX296702_I2S1_PCLK] = in zx296702_lsp0_clocks_init()
652 clk[ZX296702_I2S1_DIV] = in zx296702_lsp0_clocks_init()
655 clk[ZX296702_I2S2_WCLK_MUX] = in zx296702_lsp0_clocks_init()
658 clk[ZX296702_I2S2_WCLK] = in zx296702_lsp0_clocks_init()
660 clk[ZX296702_I2S2_PCLK] = in zx296702_lsp0_clocks_init()
663 clk[ZX296702_I2S2_DIV] = in zx296702_lsp0_clocks_init()
667 if (IS_ERR(clk[i])) { in zx296702_lsp0_clocks_init()
669 i, PTR_ERR(clk[i])); in zx296702_lsp0_clocks_init()
683 struct clk **clk = lsp1clk; in zx296702_lsp1_clocks_init() local
690 clk[ZX296702_UART0_WCLK_MUX] = in zx296702_lsp1_clocks_init()
695 clk[ZX296702_UART0_WCLK] = in zx296702_lsp1_clocks_init()
697 clk[ZX296702_UART0_PCLK] = in zx296702_lsp1_clocks_init()
701 clk[ZX296702_UART1_WCLK_MUX] = in zx296702_lsp1_clocks_init()
704 clk[ZX296702_UART1_WCLK] = in zx296702_lsp1_clocks_init()
706 clk[ZX296702_UART1_PCLK] = in zx296702_lsp1_clocks_init()
710 clk[ZX296702_SDMMC0_WCLK_MUX] = in zx296702_lsp1_clocks_init()
713 clk[ZX296702_SDMMC0_WCLK_DIV] = in zx296702_lsp1_clocks_init()
715 clk[ZX296702_SDMMC0_WCLK] = in zx296702_lsp1_clocks_init()
717 clk[ZX296702_SDMMC0_PCLK] = in zx296702_lsp1_clocks_init()
720 clk[ZX296702_SPDIF1_WCLK_MUX] = in zx296702_lsp1_clocks_init()
723 clk[ZX296702_SPDIF1_WCLK] = in zx296702_lsp1_clocks_init()
725 clk[ZX296702_SPDIF1_PCLK] = in zx296702_lsp1_clocks_init()
728 clk[ZX296702_SPDIF1_DIV] = in zx296702_lsp1_clocks_init()
733 if (IS_ERR(clk[i])) { in zx296702_lsp1_clocks_init()
735 i, PTR_ERR(clk[i])); in zx296702_lsp1_clocks_init()