Lines Matching refs:DMA_CTL0_BITS_PER_CH
34 #define DMA_CTL0_BITS_PER_CH 4 macro
221 (DMA_CTL0_BITS_PER_CH * chan->chan_id); in pdc_set_dir()
223 (DMA_CTL0_BITS_PER_CH * chan->chan_id)); in pdc_set_dir()
226 val |= 0x1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id + in pdc_set_dir()
229 val &= ~(0x1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id + in pdc_set_dir()
239 (DMA_CTL0_BITS_PER_CH * ch); in pdc_set_dir()
241 (DMA_CTL0_BITS_PER_CH * ch)); in pdc_set_dir()
244 val |= 0x1 << (DMA_CTL0_BITS_PER_CH * ch + in pdc_set_dir()
247 val &= ~(0x1 << (DMA_CTL0_BITS_PER_CH * ch + in pdc_set_dir()
266 (DMA_CTL0_BITS_PER_CH * chan->chan_id)); in pdc_set_mode()
267 mask_dir = 1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id +\ in pdc_set_mode()
271 val |= mode << (DMA_CTL0_BITS_PER_CH * chan->chan_id); in pdc_set_mode()
277 (DMA_CTL0_BITS_PER_CH * ch)); in pdc_set_mode()
278 mask_dir = 1 << (DMA_CTL0_BITS_PER_CH * ch +\ in pdc_set_mode()
282 val |= mode << (DMA_CTL0_BITS_PER_CH * ch); in pdc_set_mode()