689 	iowrite32((desc_sw->flags & XGENE_DMA_FLAG_64B_DESC) ?  in xgene_chan_xfer_request()
798 		iowrite32(-1, ring->cmd);  in xgene_dma_cleanup_descriptors()
1187 	iowrite32(val, pdma->csr_dma + XGENE_DMA_INT);  in xgene_dma_err_isr()
1202 	iowrite32(ring->num, ring->pdma->csr_ring + XGENE_DMA_RING_STATE);  in xgene_dma_wr_ring_state()
1205 		iowrite32(ring->state[i], ring->pdma->csr_ring +  in xgene_dma_wr_ring_state()
1248 	iowrite32(XGENE_DMA_RING_ID_SETUP(ring->id),  in xgene_dma_setup_ring()
1252 	iowrite32(XGENE_DMA_RING_ID_BUF_SETUP(ring->num),  in xgene_dma_setup_ring()
1269 	iowrite32(val, ring->pdma->csr_ring + XGENE_DMA_RING_NE_INT_MODE);  in xgene_dma_setup_ring()
1281 		iowrite32(val, ring->pdma->csr_ring +  in xgene_dma_clear_ring()
1287 	iowrite32(ring_id, ring->pdma->csr_ring + XGENE_DMA_RING_ID);  in xgene_dma_clear_ring()
1289 	iowrite32(0, ring->pdma->csr_ring + XGENE_DMA_RING_ID_BUF);  in xgene_dma_clear_ring()
1447 	iowrite32(val, pdma->csr_dma + XGENE_DMA_GCR);  in xgene_dma_enable()
1456 	iowrite32(val, pdma->csr_dma + XGENE_DMA_GCR);  in xgene_dma_disable()
1465 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1467 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1469 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1471 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1473 	iowrite32(XGENE_DMA_INT_ALL_MASK,  in xgene_dma_mask_interrupts()
1477 	iowrite32(XGENE_DMA_INT_ALL_MASK, pdma->csr_dma + XGENE_DMA_INT_MASK);  in xgene_dma_mask_interrupts()
1486 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1488 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1490 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1492 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1494 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1498 	iowrite32(XGENE_DMA_INT_ALL_UNMASK,  in xgene_dma_unmask_interrupts()
1507 	iowrite32(XGENE_DMA_ASSOC_RING_MNGR1,  in xgene_dma_init_hw()
1512 		iowrite32(XGENE_DMA_RAID6_MULTI_CTRL(0x1D),  in xgene_dma_init_hw()
1536 	iowrite32(0x3, pdma->csr_ring + XGENE_DMA_RING_CLKEN);  in xgene_dma_init_ring_mngr()
1537 	iowrite32(0x0, pdma->csr_ring + XGENE_DMA_RING_SRST);  in xgene_dma_init_ring_mngr()
1540 	iowrite32(0x0, pdma->csr_ring + XGENE_DMA_RING_MEM_RAM_SHUTDOWN);  in xgene_dma_init_ring_mngr()
1556 	iowrite32(XGENE_DMA_RING_THRESLD0_SET1_VAL,  in xgene_dma_init_ring_mngr()
1558 	iowrite32(XGENE_DMA_RING_THRESLD1_SET1_VAL,  in xgene_dma_init_ring_mngr()
1560 	iowrite32(XGENE_DMA_RING_HYSTERESIS_VAL,  in xgene_dma_init_ring_mngr()
1564 	iowrite32(XGENE_DMA_RING_ENABLE,  in xgene_dma_init_ring_mngr()
1579 	iowrite32(0x0, pdma->csr_dma + XGENE_DMA_MEM_RAM_SHUTDOWN);  in xgene_dma_init_mem()