Lines Matching refs:model
96 reg &= (pvt->model == 0x30) ? ~3 : ~1; in f15h_select_dct()
143 dct = (dct && pvt->model == 0x30) ? 3 : dct; in amd64_read_dct_pci_cfg()
204 if (pvt->fam == 0x15 && pvt->model == 0x60) { in __set_scrub_rate()
229 if (pvt->model < 0x10) in set_scrub_rate()
232 if (pvt->model == 0x60) in set_scrub_rate()
246 if (pvt->model < 0x10) in get_scrub_rate()
249 if (pvt->model == 0x60) in get_scrub_rate()
376 (pvt->fam == 0x15 && pvt->model >= 0x30)) { in get_cs_base_and_mask()
783 } else if (pvt->fam == 0x15 && pvt->model == 0x30) { in prep_chip_selects()
860 if (pvt->model < 0x60) in determine_memory_type()
1027 if (pvt->model == 0x60) in read_dram_base_limit_regs()
1029 else if (pvt->model == 0x30) in read_dram_base_limit_regs()
1555 if (pvt->fam == 0x15 && pvt->model >= 0x30) { in f1x_lookup_addr_in_dct()
1579 if (pvt->model < 4 || (pvt->model < 0xa && pvt->stepping < 3)) in f1x_swap_interleaved_region()
1813 if (pvt->fam == 0x15 && pvt->model >= 0x30) in f1x_translate_sysaddr_to_cs()
2347 if ((pvt->fam > 0x10 || pvt->model > 7) && tmp & BIT(25)) in read_mc_regs()
2719 pvt->model = boot_cpu_data.x86_model; in per_family_init()
2734 if (pvt->model == 0x30) { in per_family_init()
2738 } else if (pvt->model == 0x60) { in per_family_init()
2749 if (pvt->model == 0x30) { in per_family_init()