526 	struct edac_device_ctl_info *edac_dev;  member
532 static void xgene_edac_pmd_l1_check(struct edac_device_ctl_info *edac_dev,  in xgene_edac_pmd_l1_check()  argument
535 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_l1_check()
544 	dev_err(edac_dev->dev,  in xgene_edac_pmd_l1_check()
551 		dev_err(edac_dev->dev, "One or more correctable error\n");  in xgene_edac_pmd_l1_check()
553 		dev_err(edac_dev->dev, "Multiple correctable error\n");  in xgene_edac_pmd_l1_check()
556 		dev_err(edac_dev->dev, "L1 TLB multiple hit\n");  in xgene_edac_pmd_l1_check()
559 		dev_err(edac_dev->dev, "Way select multiple hit\n");  in xgene_edac_pmd_l1_check()
562 		dev_err(edac_dev->dev, "Physical tag parity error\n");  in xgene_edac_pmd_l1_check()
566 		dev_err(edac_dev->dev, "L1 data parity error\n");  in xgene_edac_pmd_l1_check()
569 		dev_err(edac_dev->dev, "L1 pre-decode parity error\n");  in xgene_edac_pmd_l1_check()
578 		edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_pmd_l1_check()
584 	dev_err(edac_dev->dev,  in xgene_edac_pmd_l1_check()
591 		dev_err(edac_dev->dev, "One or more correctable error\n");  in xgene_edac_pmd_l1_check()
593 		dev_err(edac_dev->dev, "Multiple correctable error\n");  in xgene_edac_pmd_l1_check()
596 		dev_err(edac_dev->dev, "Load tag error\n");  in xgene_edac_pmd_l1_check()
599 		dev_err(edac_dev->dev, "Load data error\n");  in xgene_edac_pmd_l1_check()
602 		dev_err(edac_dev->dev, "WSL multihit error\n");  in xgene_edac_pmd_l1_check()
605 		dev_err(edac_dev->dev, "Store tag error\n");  in xgene_edac_pmd_l1_check()
608 		dev_err(edac_dev->dev,  in xgene_edac_pmd_l1_check()
612 		dev_err(edac_dev->dev,  in xgene_edac_pmd_l1_check()
622 		edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_pmd_l1_check()
628 	dev_err(edac_dev->dev,  in xgene_edac_pmd_l1_check()
636 		dev_err(edac_dev->dev, "One or more correctable error\n");  in xgene_edac_pmd_l1_check()
638 		dev_err(edac_dev->dev, "Multiple correctable error\n");  in xgene_edac_pmd_l1_check()
641 		dev_err(edac_dev->dev, "Stage 1 UTB hit error\n");  in xgene_edac_pmd_l1_check()
644 		dev_err(edac_dev->dev, "Stage 1 UTB miss error\n");  in xgene_edac_pmd_l1_check()
647 		dev_err(edac_dev->dev, "Stage 1 UTB allocate error\n");  in xgene_edac_pmd_l1_check()
650 		dev_err(edac_dev->dev, "TMO operation single bank error\n");  in xgene_edac_pmd_l1_check()
653 		dev_err(edac_dev->dev, "Stage 2 UTB error\n");  in xgene_edac_pmd_l1_check()
656 		dev_err(edac_dev->dev, "Stage 2 UTB miss error\n");  in xgene_edac_pmd_l1_check()
659 		dev_err(edac_dev->dev, "Stage 2 UTB allocate error\n");  in xgene_edac_pmd_l1_check()
662 		dev_err(edac_dev->dev, "TMO operation multiple bank error\n");  in xgene_edac_pmd_l1_check()
669 	edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_pmd_l1_check()
672 static void xgene_edac_pmd_l2_check(struct edac_device_ctl_info *edac_dev)  in xgene_edac_pmd_l2_check()  argument
674 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_l2_check()
688 	dev_err(edac_dev->dev,  in xgene_edac_pmd_l2_check()
691 	dev_err(edac_dev->dev,  in xgene_edac_pmd_l2_check()
700 		dev_err(edac_dev->dev, "One or more correctable error\n");  in xgene_edac_pmd_l2_check()
702 		dev_err(edac_dev->dev, "Multiple correctable error\n");  in xgene_edac_pmd_l2_check()
704 		dev_err(edac_dev->dev, "One or more uncorrectable error\n");  in xgene_edac_pmd_l2_check()
706 		dev_err(edac_dev->dev, "Multiple uncorrectable error\n");  in xgene_edac_pmd_l2_check()
710 		dev_err(edac_dev->dev, "Outbound SDB parity error\n");  in xgene_edac_pmd_l2_check()
713 		dev_err(edac_dev->dev, "Inbound SDB parity error\n");  in xgene_edac_pmd_l2_check()
716 		dev_err(edac_dev->dev, "Tag ECC error\n");  in xgene_edac_pmd_l2_check()
719 		dev_err(edac_dev->dev, "Data ECC error\n");  in xgene_edac_pmd_l2_check()
728 		edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_pmd_l2_check()
731 		edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_pmd_l2_check()
740 		dev_err(edac_dev->dev,  in xgene_edac_pmd_l2_check()
747 static void xgene_edac_pmd_check(struct edac_device_ctl_info *edac_dev)  in xgene_edac_pmd_check()  argument
749 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_check()
759 		xgene_edac_pmd_l1_check(edac_dev, i);  in xgene_edac_pmd_check()
762 	xgene_edac_pmd_l2_check(edac_dev);  in xgene_edac_pmd_check()
765 static void xgene_edac_pmd_cpu_hw_cfg(struct edac_device_ctl_info *edac_dev,  in xgene_edac_pmd_cpu_hw_cfg()  argument
768 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_cpu_hw_cfg()
781 static void xgene_edac_pmd_hw_cfg(struct edac_device_ctl_info *edac_dev)  in xgene_edac_pmd_hw_cfg()  argument
783 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_hw_cfg()
794 static void xgene_edac_pmd_hw_ctl(struct edac_device_ctl_info *edac_dev,  in xgene_edac_pmd_hw_ctl()  argument
797 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_hw_ctl()
801 	if (edac_dev->op_state == OP_RUNNING_INTERRUPT) {  in xgene_edac_pmd_hw_ctl()
811 		xgene_edac_pmd_hw_cfg(edac_dev);  in xgene_edac_pmd_hw_ctl()
815 			xgene_edac_pmd_cpu_hw_cfg(edac_dev, i);  in xgene_edac_pmd_hw_ctl()
823 	struct edac_device_ctl_info *edac_dev = file->private_data;  in xgene_edac_pmd_l1_inject_ctrl_write()  local
824 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_l1_inject_ctrl_write()
849 	struct edac_device_ctl_info *edac_dev = file->private_data;  in xgene_edac_pmd_l2_inject_ctrl_write()  local
850 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_l2_inject_ctrl_write()
874 xgene_edac_pmd_create_debugfs_nodes(struct edac_device_ctl_info *edac_dev)  in xgene_edac_pmd_create_debugfs_nodes()  argument
876 	struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pmd_create_debugfs_nodes()
888 	edac_debugfs_create_file("l1_inject_ctrl", S_IWUSR, dbgfs_dir, edac_dev,  in xgene_edac_pmd_create_debugfs_nodes()
890 	edac_debugfs_create_file("l2_inject_ctrl", S_IWUSR, dbgfs_dir, edac_dev,  in xgene_edac_pmd_create_debugfs_nodes()
902 	struct edac_device_ctl_info *edac_dev;  in xgene_edac_pmd_add()  local
928 	edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx),  in xgene_edac_pmd_add()
931 	if (!edac_dev) {  in xgene_edac_pmd_add()
936 	ctx = edac_dev->pvt_info;  in xgene_edac_pmd_add()
940 	ctx->edac_dev = edac_dev;  in xgene_edac_pmd_add()
943 	edac_dev->dev = &ctx->ddev;  in xgene_edac_pmd_add()
944 	edac_dev->ctl_name = ctx->name;  in xgene_edac_pmd_add()
945 	edac_dev->dev_name = ctx->name;  in xgene_edac_pmd_add()
946 	edac_dev->mod_name = EDAC_MOD_STR;  in xgene_edac_pmd_add()
962 		edac_dev->edac_check = xgene_edac_pmd_check;  in xgene_edac_pmd_add()
964 	xgene_edac_pmd_create_debugfs_nodes(edac_dev);  in xgene_edac_pmd_add()
966 	rc = edac_device_add_device(edac_dev);  in xgene_edac_pmd_add()
974 		edac_dev->op_state = OP_RUNNING_INTERRUPT;  in xgene_edac_pmd_add()
978 	xgene_edac_pmd_hw_ctl(edac_dev, 1);  in xgene_edac_pmd_add()
986 	edac_device_free_ctl_info(edac_dev);  in xgene_edac_pmd_add()
994 	struct edac_device_ctl_info *edac_dev = pmd->edac_dev;  in xgene_edac_pmd_remove()  local
996 	xgene_edac_pmd_hw_ctl(edac_dev, 0);  in xgene_edac_pmd_remove()
997 	edac_device_del_device(edac_dev->dev);  in xgene_edac_pmd_remove()
998 	edac_device_free_ctl_info(edac_dev);  in xgene_edac_pmd_remove()
1034 	struct edac_device_ctl_info *edac_dev;  member
1066 static void xgene_edac_l3_check(struct edac_device_ctl_info *edac_dev)  in xgene_edac_l3_check()  argument
1068 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_l3_check()
1079 		dev_err(edac_dev->dev, "L3C uncorrectable error\n");  in xgene_edac_l3_check()
1081 		dev_warn(edac_dev->dev, "L3C correctable error\n");  in xgene_edac_l3_check()
1087 		dev_err(edac_dev->dev, "L3C multiple hit error\n");  in xgene_edac_l3_check()
1089 		dev_err(edac_dev->dev,  in xgene_edac_l3_check()
1092 		dev_err(edac_dev->dev, "L3C multiple uncorrectable error\n");  in xgene_edac_l3_check()
1094 		dev_err(edac_dev->dev,  in xgene_edac_l3_check()
1098 		dev_err(edac_dev->dev,  in xgene_edac_l3_check()
1106 	dev_err(edac_dev->dev, "L3C error address 0x%08X.%08X bank %d\n",  in xgene_edac_l3_check()
1109 	dev_err(edac_dev->dev,  in xgene_edac_l3_check()
1117 		edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_l3_check()
1121 		edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_l3_check()
1123 		edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_l3_check()
1126 static void xgene_edac_l3_hw_init(struct edac_device_ctl_info *edac_dev,  in xgene_edac_l3_hw_init()  argument
1129 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_l3_hw_init()
1135 	if (edac_dev->op_state == OP_RUNNING_INTERRUPT) {  in xgene_edac_l3_hw_init()
1143 	if (edac_dev->op_state == OP_RUNNING_INTERRUPT) {  in xgene_edac_l3_hw_init()
1163 	struct edac_device_ctl_info *edac_dev = file->private_data;  in xgene_edac_l3_inject_ctrl_write()  local
1164 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_l3_inject_ctrl_write()
1178 xgene_edac_l3_create_debugfs_nodes(struct edac_device_ctl_info *edac_dev)  in xgene_edac_l3_create_debugfs_nodes()  argument
1180 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_l3_create_debugfs_nodes()
1192 	debugfs_create_file("l3_inject_ctrl", S_IWUSR, dbgfs_dir, edac_dev,  in xgene_edac_l3_create_debugfs_nodes()
1199 	struct edac_device_ctl_info *edac_dev;  in xgene_edac_l3_add()  local
1223 	edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx),  in xgene_edac_l3_add()
1226 	if (!edac_dev) {  in xgene_edac_l3_add()
1231 	ctx = edac_dev->pvt_info;  in xgene_edac_l3_add()
1236 	ctx->edac_dev = edac_dev;  in xgene_edac_l3_add()
1239 	edac_dev->dev = &ctx->ddev;  in xgene_edac_l3_add()
1240 	edac_dev->ctl_name = ctx->name;  in xgene_edac_l3_add()
1241 	edac_dev->dev_name = ctx->name;  in xgene_edac_l3_add()
1242 	edac_dev->mod_name = EDAC_MOD_STR;  in xgene_edac_l3_add()
1245 		edac_dev->edac_check = xgene_edac_l3_check;  in xgene_edac_l3_add()
1247 	xgene_edac_l3_create_debugfs_nodes(edac_dev);  in xgene_edac_l3_add()
1249 	rc = edac_device_add_device(edac_dev);  in xgene_edac_l3_add()
1257 		edac_dev->op_state = OP_RUNNING_INTERRUPT;  in xgene_edac_l3_add()
1261 	xgene_edac_l3_hw_init(edac_dev, 1);  in xgene_edac_l3_add()
1269 	edac_device_free_ctl_info(edac_dev);  in xgene_edac_l3_add()
1277 	struct edac_device_ctl_info *edac_dev = l3->edac_dev;  in xgene_edac_l3_remove()  local
1279 	xgene_edac_l3_hw_init(edac_dev, 0);  in xgene_edac_l3_remove()
1281 	edac_device_free_ctl_info(edac_dev);  in xgene_edac_l3_remove()
1391 static void xgene_edac_iob_gic_report(struct edac_device_ctl_info *edac_dev)  in xgene_edac_iob_gic_report()  argument
1393 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_iob_gic_report()
1403 	dev_err(edac_dev->dev, "XGIC transaction error\n");  in xgene_edac_iob_gic_report()
1405 		dev_err(edac_dev->dev, "XGIC read size error\n");  in xgene_edac_iob_gic_report()
1407 		dev_err(edac_dev->dev, "Multiple XGIC read size error\n");  in xgene_edac_iob_gic_report()
1409 		dev_err(edac_dev->dev, "XGIC write size error\n");  in xgene_edac_iob_gic_report()
1411 		dev_err(edac_dev->dev, "Multiple XGIC write size error\n");  in xgene_edac_iob_gic_report()
1413 	dev_err(edac_dev->dev, "XGIC %s access @ 0x%08X (0x%08X)\n",  in xgene_edac_iob_gic_report()
1426 		dev_err(edac_dev->dev,  in xgene_edac_iob_gic_report()
1435 		dev_err(edac_dev->dev,  in xgene_edac_iob_gic_report()
1442 		edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_iob_gic_report()
1447 		dev_err(edac_dev->dev,  in xgene_edac_iob_gic_report()
1456 		dev_err(edac_dev->dev,  in xgene_edac_iob_gic_report()
1463 		edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_iob_gic_report()
1466 static void xgene_edac_rb_report(struct edac_device_ctl_info *edac_dev)  in xgene_edac_rb_report()  argument
1468 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_rb_report()
1478 	dev_err(edac_dev->dev, "IOB bridge agent (BA) transaction error\n");  in xgene_edac_rb_report()
1480 		dev_err(edac_dev->dev, "IOB BA write response error\n");  in xgene_edac_rb_report()
1482 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1485 		dev_err(edac_dev->dev, "IOB BA XGIC poisoned write error\n");  in xgene_edac_rb_report()
1487 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1490 		dev_err(edac_dev->dev, "IOB BA RBM poisoned write error\n");  in xgene_edac_rb_report()
1492 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1495 		dev_err(edac_dev->dev, "IOB BA write error\n");  in xgene_edac_rb_report()
1497 		dev_err(edac_dev->dev, "Multiple IOB BA write error\n");  in xgene_edac_rb_report()
1499 		dev_err(edac_dev->dev, "IOB BA transaction error\n");  in xgene_edac_rb_report()
1501 		dev_err(edac_dev->dev, "Multiple IOB BA transaction error\n");  in xgene_edac_rb_report()
1503 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1506 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1509 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1512 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1515 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1518 		dev_err(edac_dev->dev,  in xgene_edac_rb_report()
1523 	dev_err(edac_dev->dev, "IOB BA %s access at 0x%02X.%08X (0x%08X)\n",  in xgene_edac_rb_report()
1527 		dev_err(edac_dev->dev, "IOB BA requestor ID 0x%08X\n",  in xgene_edac_rb_report()
1532 static void xgene_edac_pa_report(struct edac_device_ctl_info *edac_dev)  in xgene_edac_pa_report()  argument
1534 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_pa_report()
1543 	dev_err(edac_dev->dev, "IOB procesing agent (PA) transaction error\n");  in xgene_edac_pa_report()
1545 		dev_err(edac_dev->dev, "IOB PA read data RAM error\n");  in xgene_edac_pa_report()
1547 		dev_err(edac_dev->dev,  in xgene_edac_pa_report()
1550 		dev_err(edac_dev->dev, "IOB PA write data RAM error\n");  in xgene_edac_pa_report()
1552 		dev_err(edac_dev->dev,  in xgene_edac_pa_report()
1555 		dev_err(edac_dev->dev, "IOB PA transaction error\n");  in xgene_edac_pa_report()
1557 		dev_err(edac_dev->dev, "Mutilple IOB PA transaction error\n");  in xgene_edac_pa_report()
1559 		dev_err(edac_dev->dev, "IOB PA transaction ID RAM error\n");  in xgene_edac_pa_report()
1561 		dev_err(edac_dev->dev,  in xgene_edac_pa_report()
1572 	dev_err(edac_dev->dev,  in xgene_edac_pa_report()
1586 	dev_err(edac_dev->dev,  in xgene_edac_pa_report()
1594 static void xgene_edac_soc_check(struct edac_device_ctl_info *edac_dev)  in xgene_edac_soc_check()  argument
1596 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_soc_check()
1612 		xgene_edac_iob_gic_report(edac_dev);  in xgene_edac_soc_check()
1615 		xgene_edac_rb_report(edac_dev);  in xgene_edac_soc_check()
1618 		xgene_edac_pa_report(edac_dev);  in xgene_edac_soc_check()
1621 		dev_info(edac_dev->dev,  in xgene_edac_soc_check()
1623 		edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_soc_check()
1631 		dev_err(edac_dev->dev, "SoC memory parity error 0x%08X\n",  in xgene_edac_soc_check()
1633 		edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);  in xgene_edac_soc_check()
1638 			dev_err(edac_dev->dev, "%s memory parity error\n",  in xgene_edac_soc_check()
1640 			edac_device_handle_ue(edac_dev, 0, 0,  in xgene_edac_soc_check()
1641 					      edac_dev->ctl_name);  in xgene_edac_soc_check()
1646 static void xgene_edac_soc_hw_init(struct edac_device_ctl_info *edac_dev,  in xgene_edac_soc_hw_init()  argument
1649 	struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info;  in xgene_edac_soc_hw_init()
1652 	if (edac_dev->op_state == OP_RUNNING_INTERRUPT) {  in xgene_edac_soc_hw_init()
1686 	struct edac_device_ctl_info *edac_dev;  in xgene_edac_soc_add()  local
1710 	edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx),  in xgene_edac_soc_add()
1713 	if (!edac_dev) {  in xgene_edac_soc_add()
1718 	ctx = edac_dev->pvt_info;  in xgene_edac_soc_add()
1723 	ctx->edac_dev = edac_dev;  in xgene_edac_soc_add()
1726 	edac_dev->dev = &ctx->ddev;  in xgene_edac_soc_add()
1727 	edac_dev->ctl_name = ctx->name;  in xgene_edac_soc_add()
1728 	edac_dev->dev_name = ctx->name;  in xgene_edac_soc_add()
1729 	edac_dev->mod_name = EDAC_MOD_STR;  in xgene_edac_soc_add()
1732 		edac_dev->edac_check = xgene_edac_soc_check;  in xgene_edac_soc_add()
1734 	rc = edac_device_add_device(edac_dev);  in xgene_edac_soc_add()
1742 		edac_dev->op_state = OP_RUNNING_INTERRUPT;  in xgene_edac_soc_add()
1746 	xgene_edac_soc_hw_init(edac_dev, 1);  in xgene_edac_soc_add()
1755 	edac_device_free_ctl_info(edac_dev);  in xgene_edac_soc_add()
1763 	struct edac_device_ctl_info *edac_dev = soc->edac_dev;  in xgene_edac_soc_remove()  local
1765 	xgene_edac_soc_hw_init(edac_dev, 0);  in xgene_edac_soc_remove()
1767 	edac_device_free_ctl_info(edac_dev);  in xgene_edac_soc_remove()
1792 			xgene_edac_pmd_check(pmd->edac_dev);  in xgene_edac_isr()
1796 		xgene_edac_l3_check(node->edac_dev);  in xgene_edac_isr()
1799 		xgene_edac_soc_check(node->edac_dev);  in xgene_edac_isr()