80 	*val = readl(edac->pcp_csr + reg);  in xgene_edac_pcp_rd()
89 	val = readl(edac->pcp_csr + reg);  in xgene_edac_pcp_clrbits()
101 	val = readl(edac->pcp_csr + reg);  in xgene_edac_pcp_setbits()
205 		reg = readl(ctx->mcu_csr + MCUESRR0 + rank * MCU_RANK_STRIDE);  in xgene_edac_mc_check()
220 			bank = readl(ctx->mcu_csr + MCUEBLRR0 +  in xgene_edac_mc_check()
222 			col_row = readl(ctx->mcu_csr + MCUERCRR0 +  in xgene_edac_mc_check()
224 			count = readl(ctx->mcu_csr + MCUSBECNT0 +  in xgene_edac_mc_check()
246 	reg = readl(ctx->mcu_csr + MCUGESR);  in xgene_edac_mc_check()
293 		val = readl(ctx->mcu_csr + MCUGECR);  in xgene_edac_mc_irq_ctl()
301 		val = readl(ctx->mcu_csr + MCUGECR);  in xgene_edac_mc_irq_ctl()
541 	val = readl(pg_f + MEMERR_CPU_ICFESR_PAGE_OFFSET);  in xgene_edac_pmd_l1_check()
581 	val = readl(pg_f + MEMERR_CPU_LSUESR_PAGE_OFFSET);  in xgene_edac_pmd_l1_check()
625 	val = readl(pg_f + MEMERR_CPU_MMUESR_PAGE_OFFSET);  in xgene_edac_pmd_l1_check()
683 	val = readl(pg_e + MEMERR_L2C_L2ESR_PAGE_OFFSET);  in xgene_edac_pmd_l2_check()
686 	val_lo = readl(pg_e + MEMERR_L2C_L2EALR_PAGE_OFFSET);  in xgene_edac_pmd_l2_check()
687 	val_hi = readl(pg_e + MEMERR_L2C_L2EAHR_PAGE_OFFSET);  in xgene_edac_pmd_l2_check()
736 	val = readl(pg_d + CPUX_L2C_L2RTOSR_PAGE_OFFSET);  in xgene_edac_pmd_l2_check()
738 		val_lo = readl(pg_d + CPUX_L2C_L2RTOALR_PAGE_OFFSET);  in xgene_edac_pmd_l2_check()
739 		val_hi = readl(pg_d + CPUX_L2C_L2RTOAHR_PAGE_OFFSET);  in xgene_edac_pmd_l2_check()
1074 	l3cesr = readl(ctx->dev_csr + L3C_ESR);  in xgene_edac_l3_check()
1083 	l3celr = readl(ctx->dev_csr + L3C_ELR);  in xgene_edac_l3_check()
1084 	l3caelr = readl(ctx->dev_csr + L3C_AELR);  in xgene_edac_l3_check()
1085 	l3cbelr = readl(ctx->dev_csr + L3C_BELR);  in xgene_edac_l3_check()
1132 	val = readl(ctx->dev_csr + L3C_ECR);  in xgene_edac_l3_hw_init()
1400 	reg = readl(ctx->dev_csr + XGICTRANSERRINTSTS);  in xgene_edac_iob_gic_report()
1412 	info = readl(ctx->dev_csr + XGICTRANSERRREQINFO);  in xgene_edac_iob_gic_report()
1420 	reg = readl(ctx->dev_csr + GLBL_ERR_STS);  in xgene_edac_iob_gic_report()
1424 		err_addr_lo = readl(ctx->dev_csr + GLBL_SEC_ERRL);  in xgene_edac_iob_gic_report()
1425 		err_addr_hi = readl(ctx->dev_csr + GLBL_SEC_ERRH);  in xgene_edac_iob_gic_report()
1433 		err_addr_lo = readl(ctx->dev_csr + GLBL_MSEC_ERRL);  in xgene_edac_iob_gic_report()
1434 		err_addr_hi = readl(ctx->dev_csr + GLBL_MSEC_ERRH);  in xgene_edac_iob_gic_report()
1445 		err_addr_lo = readl(ctx->dev_csr + GLBL_DED_ERRL);  in xgene_edac_iob_gic_report()
1446 		err_addr_hi = readl(ctx->dev_csr + GLBL_DED_ERRH);  in xgene_edac_iob_gic_report()
1454 		err_addr_lo = readl(ctx->dev_csr + GLBL_MDED_ERRL);  in xgene_edac_iob_gic_report()
1455 		err_addr_hi = readl(ctx->dev_csr + GLBL_MDED_ERRH);  in xgene_edac_iob_gic_report()
1474 	reg = readl(ctx->dev_csr + IOBBATRANSERRINTSTS);  in xgene_edac_rb_report()
1521 	err_addr_lo = readl(ctx->dev_csr + IOBBATRANSERRREQINFOL);  in xgene_edac_rb_report()
1522 	err_addr_hi = readl(ctx->dev_csr + IOBBATRANSERRREQINFOH);  in xgene_edac_rb_report()
1528 			readl(ctx->dev_csr + IOBBATRANSERRCSWREQID));  in xgene_edac_rb_report()
1540 	reg = readl(ctx->dev_csr + IOBPATRANSERRINTSTS);  in xgene_edac_pa_report()
1567 	reg = readl(ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);  in xgene_edac_pa_report()
1570 	err_addr_lo = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOL);  in xgene_edac_pa_report()
1571 	err_addr_hi = readl(ctx->dev_csr + IOBAXIS0TRANSERRREQINFOH);  in xgene_edac_pa_report()
1581 	reg = readl(ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);  in xgene_edac_pa_report()
1584 	err_addr_lo = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOL);  in xgene_edac_pa_report()
1585 	err_addr_hi = readl(ctx->dev_csr + IOBAXIS1TRANSERRREQINFOH);  in xgene_edac_pa_report()