Lines Matching refs:socfpga_fpga_writel
150 static void socfpga_fpga_writel(struct socfpga_fpga_priv *priv, u32 reg_offset, in socfpga_fpga_writel() function
180 socfpga_fpga_writel(priv, offset, val); in socfpga_fpga_set_bitsl()
190 socfpga_fpga_writel(priv, offset, val); in socfpga_fpga_clr_bitsl()
212 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_DCLKSTAT_OFST, in socfpga_fpga_clear_done_status()
231 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_DCLKCNT_OFST, count); in socfpga_fpga_dclk_set_and_wait_clear()
267 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTTYPE_LEVEL_OFST, 0); in socfpga_fpga_enable_irqs()
270 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INT_POL_OFST, irqs); in socfpga_fpga_enable_irqs()
273 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_PORTA_EOI_OFST, irqs); in socfpga_fpga_enable_irqs()
276 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTMSK_OFST, 0); in socfpga_fpga_enable_irqs()
279 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTEN_OFST, irqs); in socfpga_fpga_enable_irqs()
284 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTEN_OFST, 0); in socfpga_fpga_disable_irqs()
364 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg); in socfpga_fpga_cfg_mode_set()
391 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg); in socfpga_fpga_reset()
398 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg); in socfpga_fpga_reset()
430 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_PORTA_EOI_OFST, in socfpga_fpga_ops_configure_init()