Lines Matching refs:mm_gc
53 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_unmask() local
58 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_unmask()
61 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_unmask()
64 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_unmask()
71 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_mask() local
76 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_mask()
79 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_mask()
82 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_mask()
133 struct of_mm_gpio_chip *mm_gc; in altera_gpio_get() local
135 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_get()
137 return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset)); in altera_gpio_get()
142 struct of_mm_gpio_chip *mm_gc; in altera_gpio_set() local
147 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_set()
148 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_set()
151 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_set()
156 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_set()
162 struct of_mm_gpio_chip *mm_gc; in altera_gpio_direction_input() local
167 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_direction_input()
168 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_direction_input()
172 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_input()
174 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_input()
183 struct of_mm_gpio_chip *mm_gc; in altera_gpio_direction_output() local
188 mm_gc = to_of_mm_gpio_chip(gc); in altera_gpio_direction_output()
189 chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); in altera_gpio_direction_output()
193 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_direction_output()
198 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_direction_output()
201 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_output()
203 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); in altera_gpio_direction_output()
213 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_edge_handler() local
220 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_edge_handler()
226 (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) & in altera_gpio_irq_edge_handler()
227 readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) { in altera_gpio_irq_edge_handler()
228 writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP); in altera_gpio_irq_edge_handler()
229 for_each_set_bit(i, &status, mm_gc->gc.ngpio) { in altera_gpio_irq_edge_handler()
242 struct of_mm_gpio_chip *mm_gc; in altera_gpio_irq_leveL_high_handler() local
249 mm_gc = &altera_gc->mmchip; in altera_gpio_irq_leveL_high_handler()
254 status = readl(mm_gc->regs + ALTERA_GPIO_DATA); in altera_gpio_irq_leveL_high_handler()
255 status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); in altera_gpio_irq_leveL_high_handler()
257 for_each_set_bit(i, &status, mm_gc->gc.ngpio) { in altera_gpio_irq_leveL_high_handler()